ATA6616-P3PW Atmel, ATA6616-P3PW Datasheet - Page 246

• Manufacturer Part Number: ATA6616-P3PW
• Description: TXRX MULTICHIP MOD LIN SIP 38QFN
• Manufacturer: Atmel
• Series: AVR® ATA66 LIN-SBCr

Specifications of ATA6616-P3PW

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, LIN, SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 16
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 38-VQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.21.2.4
246
Atmel ATA6616/ATA6617
Reading the Signature Row from Software
Similarly, when reading the Extended Fuse byte (EFB), load 0x0002 in the Z-pointer. When an
LPM instruction is executed within three cycles after the RFLB and SPMEN bits are set in the
SPMCSR, the value of the Extended Fuse byte will be loaded in the destination register as
shown below. See
Extended Fuse byte.
Fuse and Lock bits that are programmed, will be read as zero. Fuse and Lock bits that are
unprogrammed, will be read as one.
To read the Signature Row from software, load the Z-pointer with the signature byte address
given in
LPM instruction is executed within three CPU cycles after the SIGRD and SPMEN bits are set
in SPMCSR, the signature byte value will be loaded in the destination register. The SIGRD
and SPMEN bits will auto-clear upon completion of reading the Signature Row Lock bits or if
no LPM instruction is executed within three CPU cycles. When SIGRD and SPMEN are
cleared, LPM will work as described in the Instruction set Manual.
Table 4-65.
Note:
Bit
Rd (Z=0x0003)
Bit
Rd (Z=0x0002)
8MHz RC Oscillator Calibration Byte
TSOFFSET - Temp Sensor Offset
All other addresses are reserved for future use.
Table 4-65 on page 246
TSGAIN - Temp Sensor Gain
Device Signature Byte 0
Device Signature Byte 1
Device Signature Byte 2
Signature Row Addressing
FHB7
Signature Byte
7
–
7
Table 4-69 on page 251
FHB6
6
–
6
FHB5
and set the SIGRD and SPMEN bits in SPMCSR. When an
5
–
5
FHB4
4
–
4
for detailed description and mapping of the
FHB3
3
3
–
FHB2
Z-Pointer Address
2
–
2
0x0000
0x0002
0x0004
0x0001
0x0003
0x0005
FHB1
1
–
1
EFB0
FHB0
9132D–AUTO–12/10
0
0