ATA6616-P3PW Atmel, ATA6616-P3PW Datasheet - Page 64

• Manufacturer Part Number: ATA6616-P3PW
• Description: TXRX MULTICHIP MOD LIN SIP 38QFN
• Manufacturer: Atmel
• Series: AVR® ATA66 LIN-SBCr

Specifications of ATA6616-P3PW

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, LIN, SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 16
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 38-VQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.5.5.4
64
Atmel ATA6616/ATA6617
CLKSELR - Clock Selection Register
• Bits 3:0 – CLKC3:0: Clock Control Bits 3 - 0
These bits define the command to provide to the ‘Clock Switch’ module. The special write pro-
cedure must be followed to change the CLKC3..0 bits
Change Enable” on page
Interrupts should be disabled when setting CLKCSR register in order not to disturb the
procedure.
Table 4-15.
• Bit 7– Res: Reserved Bit
This bit is reserved bit in the Atmel
• Bit 6 – COUT: Clock Out
The COUT bit is initialized with ~(CKOUT) Fuse bit.
The COUT bit is only used in case of ‘CKOUT’ command. Refer to
put Buffer” on page 55
In case of ‘Recover System Clock Source’ command, COUT it is not affected (no recovering of
this setting).
• Bits 5:4 – CSUT1:0: Clock Start-up Time
CSUT bits are initialized with the values of SUT Fuse bits.
In case of ‘Enable/Disable Clock Source’ command, CSUT field provides the code of the clock
start-up time. Refer to subdivisions of
clock start-up times.
In case of ‘Recover System Clock Source’ command, CSUT field is not affected (no recover-
ing of SUT code).
Clock Command
No command
Disable clock source
Enable clock source
Request for clock
Clock source switch
Recover system clock source code
Enable watchdog in automatic reload mode
CKOUT command
No command
Bit
Read/Write
Initial Value
1. Write the Clock Control Change Enable (CLKCCE) bit to one and all other bits in
2. Within 4 cycles, write the desired value to CLKCSR register while clearing CLKCCE
CLKCSR to zero.
bit.
Clock Command List
R
7
0
-
availability
~ (CKOUT)
COUT
for using.
fuse
R/W
6
63.).
CSUT1
R/W
®
5
ATtiny87/167 and will always read as zero.
SUT1..0
fuses
Section 4.5.2 “Clock Sources” on page 49
CSUT0
R/W
4
CSEL3
R/W
3
(See ”Bit 7 – CLKCCE: Clock Control
CSEL2
R/W
2
CKSEL3..0
fuses
Section 4.5.2.7 “Clock Out-
CSEL1
R/W
1
CSEL0
R/W
CLKC3..0
9132D–AUTO–12/10
0
1xxx
0000
0001
0010
0011
0100
0101
0110
0111
for code of
CLKSELR
b
b
b
b
b
b
b
b
b