ATA6616-P3PW Atmel, ATA6616-P3PW Datasheet - Page 46

• Manufacturer Part Number: ATA6616-P3PW
• Description: TXRX MULTICHIP MOD LIN SIP 38QFN
• Manufacturer: Atmel
• Series: AVR® ATA66 LIN-SBCr

Specifications of ATA6616-P3PW

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, LIN, SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 16
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 38-VQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.4.5.2
4.4.5.3
46
Atmel ATA6616/ATA6617
EEDR – EEPROM Data Register
EECR – EEPROM Control Register
• Bits 8:0 – EEAR8:0: EEPROM Address
The EEPROM Address Registers – EEARH and EEARL – specifies the high EEPROM
address in the EEPROM space (see “E2 size” in
bytes are addressed linearly between 0 and “E2 size”. The initial value of EEAR is undefined.
A proper value must be written before the EEPROM may be accessed.
Note:
• Bits 7:0 – EEDR7:0: EEPROM Data
For the EEPROM write operation the EEDR Register contains the data to be written to the
EEPROM in the address given by the EEAR Register. For the EEPROM read operation, the
EEDR contains the data read out from the EEPROM at the address given by EEAR.
• Bit 7,6 – Res: Reserved Bits
These bits are reserved for future use and will always read as 0 in Atmel ATtiny87/167. After
reading, mask out these bits. For compatibility with future AVR
bits to zero.
• Bits 5, 4 – EEPM1 and EEPM0: EEPROM Programming Mode Bits
The EEPROM Programming mode bits setting defines which programming action that will be
triggered when writing EEPE. It is possible to program data in one atomic operation (erase the
old value and program the new value) or to split the Erase and Write operations in two differ-
ent operations. The Programming times for the different modes are shown in
EEPE is set, any write to EEPMn will be ignored. During reset, the EEPMn bits will be reset to
0b00 unless the EEPROM is busy programming.
Table 4-4.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
EEPM1
0
0
1
1
For information only - ATtiny47: EEAR8 exists as register bit but it is not used for addressing.
EEPM0
EEDR7
EEPROM Mode Bits
0
1
0
1
R/W
R
7
0
7
–
0
EEDR6
Programming
R/W
R
6
0
6
–
0
Typical
3.4ms
1.8ms
1.8ms
Time
–
EEDR5
EEPM1
R/W
R/W
X
5
0
5
Operation
Erase and Write in one operation (Atomic Operation)
Erase Only
Write Only
Reserved for future use
EEDR4
EEPM0
R/W
R/W
4
0
4
X
EEDR3
Table 4-3 on page
EERIE
R/W
R/W
3
0
3
0
EEMPE
EEDR2
R/W
R/W
2
0
2
0
®
devices, always write these
EEDR1
EEPE
R/W
R/W
39). The EEPROM data
X
1
0
1
EEDR0
EERE
Table
R/W
R/W
9132D–AUTO–12/10
0
0
0
0
4-4. While
EEDR
EECR