ATA6616-P3PW Atmel, ATA6616-P3PW Datasheet - Page 222

• Manufacturer Part Number: ATA6616-P3PW
• Description: TXRX MULTICHIP MOD LIN SIP 38QFN
• Manufacturer: Atmel
• Series: AVR® ATA66 LIN-SBCr

Specifications of ATA6616-P3PW

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, LIN, SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 16
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 38-VQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.18.7
4.18.7.1
222
Atmel ATA6616/ATA6617
ADC Noise Canceler
Analog Input Circuitry
The ADC features a noise canceler that enables conversion during sleep mode to reduce
noise induced from the CPU core and other I/O peripherals. The noise canceler can be used
with ADC Noise Reduction and Idle mode. To make use of this feature, the following proce-
dure should be used:
Note that the ADC will not be automatically turned off when entering other sleep modes than
Idle mode and ADC Noise Reduction mode. The user is advised to write zero to ADEN before
entering such sleep modes to avoid excessive power consumption.
The analog input circuitry for single ended channels is illustrated in Figure 4-89. An analog
source applied to ADCn is subjected to the pin capacitance and input leakage of that pin,
regardless of whether that channel is selected as input for the ADC. When the channel is
selected, the source must drive the S/H capacitor through the series resistance (combined
resistance in the input path).
The ADC is optimized for analog signals with an output impedance of approximately 10 k or
less. If such a source is used, the sampling time will be negligible. If a source with higher
impedance is used, the sampling time will depend on how long time the source needs to
charge the S/H capacitor, with can vary widely. The user is recommended to only use low
impedant sources with slowly varying signals, since this minimizes the required charge trans-
fer to the S/H capacitor.
Signal components higher than the Nyquist frequency (f
distortion from unpredictable signal convolution. The user is advised to remove high frequency
components with a low-pass filter before applying the signals as inputs to the ADC.
Figure 4-89. Analog Input Circuitry
a. Make sure that the ADC is enabled and is not busy converting. Single Conversion
b. Enter ADC Noise Reduction mode (or Idle mode). The ADC will start a conver-
c. If no other interrupts occur before the ADC conversion completes, the ADC inter-
mode must be selected and the ADC conversion complete interrupt must be
enabled.
sion once the CPU has been halted.
rupt will wake up the CPU and execute the ADC Conversion Complete interrupt
routine. If another interrupt wakes up the CPU before the ADC conversion is com-
plete, that interrupt will be executed, and an ADC Conversion Complete interrupt
request will be generated when the ADC conversion completes. The CPU will
remain in active mode until a new sleep command is executed.
ADCn
I
IH
I
IL
1..100 kO
ADC
/2) should not be present to avoid
C
S/H
= 14 pF
V
CC
/2
9132D–AUTO–12/10