ATA6616-P3PW Atmel, ATA6616-P3PW Datasheet - Page 200

• Manufacturer Part Number: ATA6616-P3PW
• Description: TXRX MULTICHIP MOD LIN SIP 38QFN
• Manufacturer: Atmel
• Series: AVR® ATA66 LIN-SBCr

Specifications of ATA6616-P3PW

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, LIN, SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 16
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 38-VQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.16.5.8
4.16.5.9
200
Atmel ATA6616/ATA6617
xxOK Flags
xxERR Flags
There are three xxOK flags in LINSIR register:
These flags can generate interrupts if the corresponding enable interrupt bit is set in the LINE-
NIR register (see
LERR bit of the LINSIR register is an logical ‘OR’ of all the bits of LINERR register (see
tion 4.16.5.13 “Interrupts” on page
• LIDOK: LIN IDentifier OK
• LRXOK: LIN RX response complete
• LTXOK: LIN TX response complete
• LBERR = LIN Bit ERRor.
• LCERR = LIN Checksum ERRor.
• LPERR = LIN Parity ERRor (identifier).
• LSERR = LIN Synchronization ERRor.
• LFERR = LIN Framing ERRor.
• LTOERR = LIN Time Out ERRor.
It is set at the end of the header, either by the Tx Header function or by the Rx Header. In
LIN 1.3, before generating LIDOK, the controller updates the LRXDL & LTXDL fields in
LINDLR register.
It is not driven in UART mode.
It is set at the end of the response by the Rx Response function in LIN mode and once a
character is received in UART mode.
It is set at the end of the response by the Tx Response function in LIN mode and once a
character has been sent in UART mode.
A unit that is sending a bit on the bus also monitors the bus. A LIN bit error will be flagged
when the bit value that is monitored is different from the bit value that is sent. After
detection of a LIN bit error the transmission is aborted.
A LIN checksum error will be flagged if the inverted modulo-256 sum of all received data
bytes (and the protected identifier in LIN 2.1) added to the checksum does not result in
0xFF.
A LIN parity error in the IDENTIFIER field will be flagged if the value of the parity bits does
not match with the identifier value. (See LP[1:0] bits in
Register - LINIDR” on page
corrupted parity bits and a corrupted identifier. The hardware does not undertake any
correction. However, the LIN slave application has to solve this as:
- known identifier (parity bits corrupted),
- or corrupted identifier to be ignored,
- or new identifier.
A LIN synchronization error will be flagged if a slave detects the edges of the SYNCH field
outside the given tolerance.
A framing error will be flagged if dominant STOP bit is sampled.
Same function in UART mode.
A time-out error will be flagged if the MESSAGE frame is not fully completed within the
maximum length T
IDENTIFIER fields (see
Section 4.16.5.13 “Interrupts” on page
Frame_Maximum
Section 4.16.5.10 “Frame Time Out” on page
209). A LIN slave application does not distinguish between
202). There are eight flags:
by any slave task upon transmission of the SYNCH and
202).
Section 4.16.6.8 “LIN Identifier
201).
9132D–AUTO–12/10
Sec-