HD6417708SF60V Renesas Electronics America, HD6417708SF60V Datasheet - Page 271

IC SUPERH MPU ROMLESS 208LQFP

HD6417708SF60V

Manufacturer Part Number
HD6417708SF60V
Description
IC SUPERH MPU ROMLESS 208LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417708SF60V

Core Processor
SH-2
Core Size
32-Bit
Speed
60MHz
Connectivity
EBI/EMI, SCI, SmartCard
Peripherals
POR, WDT
Number Of I /o
8
Program Memory Type
ROMless
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
208-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Ram Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417708SF60V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6417708SF60V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Refresh Timing: The bus state controller includes a function for controlling DRAM refreshing.
Refreshing using a CAS-before-RAS cycle can be performed by clearing the RMODE bit to 0 and
setting the RFSH bit to 1 in MCR for area 3 DRAM, or by clearing the RMODE bit to 0 and
setting the RFSH bit to 1 in DCR for area 2 DRAM. It also supports self-refresh mode.
When CAS-before-RAS refresh cycles are executed, refreshing is performed at intervals
determined by the input clock selected by bits CKS2–CKS0 in RTCSR, and the value set in
RTCOR. The value of bits CKS2–CKS0 in RTCOR should be set so as to satisfy the stipulation
for the DRAM refresh interval. First make the settings for RTCOR, RTCNT, and the RMODE and
RFSH bits in MCR, then make the CKS2–CKS0 setting. When the clock is selected by CKS2 to
CKS0, RTCNT starts counting up from the value at that time. The RTCNT value is constantly
compared with the RTCOR value, and if the two values are the same, a refresh request is
generated and the IRQOUT pin goes low. If the SH7708 Series’ external bus can be used, CAS-
before-RAS refreshing is performed, and if there is no other interrupt request the IRQOUT pin
goes high. At the same time, RTCNT is cleared to zero and the count-up is restarted. Figure 10.20
shows the operation of CAS-before-RAS refreshing.
H'00000000
RTCSR.CKS(2–0)
RTCNT
CMF
External bus
RTCOR value
Figure 10.20 CAS-Before-RAS Refresh Operation
CMF flag cleared by start of
refresh cycle
= 000
000
CAS-before-RAS refresh cycle
RTCNT cleared to 0 when
RTCNT = RTCOR
Time
251

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