HD6417708SF60V Renesas Electronics America, HD6417708SF60V Datasheet - Page 189
HD6417708SF60V
Manufacturer Part Number
HD6417708SF60V
Description
IC SUPERH MPU ROMLESS 208LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.HD6417708SF60V.pdf
(635 pages)
Specifications of HD6417708SF60V
Core Processor
SH-2
Core Size
32-Bit
Speed
60MHz
Connectivity
EBI/EMI, SCI, SmartCard
Peripherals
POR, WDT
Number Of I /o
8
Program Memory Type
ROMless
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
208-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Ram Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD6417708SF60V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6417708SF60V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
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5. The frequency of the peripheral clock (P ) becomes:
6. The output frequency of PLL circuit 1 is the product of the CKIO frequency and the
7.
Note: SH7708R only
8. For more in formation about the range of usable freguencies for each clock operating mode,see
multiplication ratio of PLL circuit 1. This frequency should be equal to or lower than 60
MHz(SH7708, SH7708S) / 100 MHz(SH7708R).
and
control register. The on/off state of PLL circuit 2 is determined by the mode. 3 multiplication
of PLL circuit 1 and
table 9.4.
1, 2, 3* or 4 can be used as the multiplication ratio of PLL circuit 1. 1, 1/2, 1/3*,
1/4 can be selected as the division ratios of dividers 1 and 2. Set the rate in the frequency
Do not set the internal clock frequency lower than the CKIO pin frequency.
The product of the frequency of the CKIO pin, the frequency multiplication ratio of
PLL circuit 1, and the division ratio of divider 2 when the clock operating mode is 0–2
or 7.
The product of the frequency of the CKIO pin and the division ratio of divider 2 when
the clock operating mode is 3 and 4.
The peripheral clock frequency should not be set higher than the frequency of the CKIO
pin, higher than 30 MHz(SH7708, SH7708S) / 33.3 MHz(SH7708R), or lower than 1/4
(SH7708, SH7708S) / 1/8(SH7708R) the internal clock (I ).
1/3 of dividers 1 and 2 are not supported in emulator.
169
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