HD6417708SF60V Renesas Electronics America, HD6417708SF60V Datasheet - Page 220
HD6417708SF60V
Manufacturer Part Number
HD6417708SF60V
Description
IC SUPERH MPU ROMLESS 208LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.HD6417708SF60V.pdf
(635 pages)
Specifications of HD6417708SF60V
Core Processor
SH-2
Core Size
32-Bit
Speed
60MHz
Connectivity
EBI/EMI, SCI, SmartCard
Peripherals
POR, WDT
Number Of I /o
8
Program Memory Type
ROMless
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
208-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Ram Size
-
Program Memory Size
-
Data Converters
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD6417708SF60V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6417708SF60V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
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10.2
10.2.1
The bus control register 1 (BCR1) is a 16-bit read/write register that sets the functions and bus
cycle status for each area. It is initialized to H'0000 by a power-on reset, but is not initialized by a
manual reset or in standby mode. Do not access external memory outside area 0 until BCR1
register initialization is complete.
Notes: 1. Samples the value of the external pin designating endian upon a power-on reset.
Bits 15 and 14—Reserved: These bits always read 0. The write value should always be 0.
Bits 13 (SH7708)—Reserved: These bits always read 0. The write value should always be 0. This
bit is not supported in emulator.
Bit 13 (SH7708S, SH7708R) —High-Z Memory Control (HIZMEM): Specifies the state of A25
to A0, BS, CS, RD/WR, WE/DQM, RD, MD3/CE2A, and MD4/CE2B in standby mode.
Bit 13: HIZMEM
0
1
Bit 12—High-Z Control (HIZCNT): Specifies the state of the RAS and CAS signals in the standby
and bus-released states.
200
Initial value:
Initial value:
2. Reserved bit in the SH7708.
Bit name:
Bit name: A5BST0 A6BST1 A6BST0
BSC Registers
Bus Control Register 1 (BCR1)
R/W:
R/W:
Bit:
Bit:
Description
High-impedance (high-Z) in standby mode
Drive state in standby mode
R/W
15
—
0
R
7
0
R/W
14
—
0
R
6
0
HIZMEM*
R/W
R/W
13
0
5
0
2
HIZCNT ENDIAN A0BST1 A0BST0 A5BST1
DRAM
R/W
TP2
R/W
12
0
4
0
DRAM
0/1*
TP1
R/W
11
R
3
0
1
DRAM
R/W
TP0
R/W
10
0
2
0
A5PCM A6PCM
R/W
R/W
9
0
1
0
(Initial value)
R/W
R/W
8
0
0
0
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