HD64F38024DV Renesas Electronics America, HD64F38024DV Datasheet - Page 961

• Manufacturer Part Number: HD64F38024DV
• Description: IC H8/SLP MCU FLASH 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300L SLPr

Specifications of HD64F38024DV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: SCI
• Peripherals: LCD, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

r. Section Name
s. Added Implicit Declarations
t. Reentrant library
u. Support of Little-endian Space (only in H8SX)
3. Added and Improved Features in Upgrade from Ver. 6.0 to Ver. 6.1
a. Support for AE5
b. Enhanced Conformance with the ANSI Standard
c. Compatibility of Output Object Code with Object Code Produced by Ver. 4.0
d. Expanded Specifications of cpuexpand=v6 Specified with legacy=v4
e. Preferential Allocation of Register Storage Class Variables
f. Division of Optimizing Ranges
Changing the section name of P, C, B or D into S by the section option causes a warning error.
S is the reserved name for the stack area.
_ _ H8SXN_ _, _ _ H8SXM_ _, _ _ H8SXA_ _, _ _ H8SXX_ _,
_ _ HAS_MULTIPLIER_ _, _ _HAS_DIVIDER_ _, _ _INTRINSIC_LIB_ _,
_ _ DATA_ADDRESS_SIZE_ _, _ _ H8_ _, _ _RENESAS_VERSION_ _, and
_ _ RENESAS_ _ are implicitly declared using #define directive by the compiler.
If the reent option is specified to the library generator, a reentrant library is created.
A little-endian space is supported depending on a chip of H8SX. A 2 -or 4--byte datum in a
little-endian space should be written and read with its own data size. In order to do so, the
feature of the _ _evenaccess keyword is enhandced.
AE5 is supported.
strict_ansi brings the associative rule of floating-point operations into conformance with the
ANSI standard.
With H8S CPUs, legacy=v4 supports the output of object code which is compatible with that
produced by earlier versions of the compiler (Ver.4.0).
When cpuexpand=v6 is specified with legacy=v4, output object code is compatible with
object code produced by Ver. 6.00 and the cpuexpand option.
enable_register preferentially allocates the variables with register storage class specification
to registers.
scope/noscope can be specified to select whether or not to divide up ranges for optimization
within functions.
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