HD64F38024DV Renesas Electronics America, HD64F38024DV Datasheet - Page 9

• Manufacturer Part Number: HD64F38024DV
• Description: IC H8/SLP MCU FLASH 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300L SLPr

Specifications of HD64F38024DV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: SCI
• Peripherals: LCD, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 5
5.1
5.2
Section 6
6.1
6.2
Section 7
7.1
7.2
Section 8
8.1
8.2
8.3
8.4
4.2.3
4.2.4
4.2.5
4.2.6
4.2.7
4.2.8
4.2.9
4.2.10 Options Other Than Above ..................................................................................139
Comand Line Format ........................................................................................................141
Option Descriptions ..........................................................................................................141
5.2.1
5.2.2
5.2.3
Overview...........................................................................................................................147
Starting the Stack Analysis Tool.......................................................................................147
Environment Variables List ..............................................................................................149
Compiler Implicit Declaration ..........................................................................................153
Naming Files .....................................................................................................................155
Compiler Listings..............................................................................................................157
8.2.1
8.2.2
8.2.3
8.2.4
8.2.5
8.2.6
Assembler Listings............................................................................................................167
8.3.1
8.3.2
8.3.3
8.3.4
Linkage Listings................................................................................................................171
8.4.1
8.4.2
8.4.3
8.4.4
List Options..........................................................................................................117
Optimize Options .................................................................................................119
Section Options....................................................................................................125
Verify Options .....................................................................................................127
Other Options.......................................................................................................129
Subcommand File Option ....................................................................................137
CPU Option..........................................................................................................138
Standard Library Generator Operating Method.............................. 141
Additional Options...............................................................................................142
Options Unavailable for Standard Library Generator ..........................................145
Notes on Specifying Options ...............................................................................146
Operating Stack Analysis Tool ....................................................... 147
Environment Variables ................................................................... 149
File Specifications........................................................................... 155
Structure of Compiler Listings.............................................................................157
Source Listing ......................................................................................................158
Error Information .................................................................................................160
Symbol Allocation Information ...........................................................................161
Object Information...............................................................................................164
Statistics Information ...........................................................................................166
Structure of Assembler Listings...........................................................................167
Source Listing ......................................................................................................167
Cross Reference Listing .......................................................................................169
Section Information Listing .................................................................................171
Structure of Linkage Listing ................................................................................172
Option Information ..............................................................................................173
Error Information .................................................................................................173
Linkage Map Information ....................................................................................174
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