HD64F38024DV Renesas Electronics America, HD64F38024DV Datasheet - Page 338

• Manufacturer Part Number: HD64F38024DV
• Description: IC H8/SLP MCU FLASH 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300L SLPr

Specifications of HD64F38024DV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: SCI
• Peripherals: LCD, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

324
Stack
of
interrupt
function
Stack
of
interrupted
function
STK+ 100
Higher
address
address
Lower
Lower
address
Higher
address
sp
Figure 10.2 Stack Processing by an Interrupt Function
Example:
3. When an interrupt function termination is specified (sy=), the program
extern char
1. STK+100 is set as the stack pointer used by interrupt functions f and g.
2.
jumps to the address specified by the JMP instruction. For the function
name of the interrupt function termination specification, $ + <function
name> can be specified as well as <function name>. If $ + <function
name> is specified, no underscore character (_) to mean an external
identifier is added at the beginning of the function name.
#pragma interrupt ( f(sp=STK+100, tn=2) )
_ _interrupt(sp=STK+100, tn=2) void g(void);
After the interrupt function has completed its processing, trap exception
processing starts by TRAPA #2. The SP at the beginning of the trap
exception processing is shown in the figure below. In the trap routine,
the previous PC, CCR (condition code register), and EXR (extended
control register: only for the H8SX, H8S/2600 and H8S/2000) must be
popped from the stack by the RTE instruction, then control must be
returned from the interrupt function.
after interrupt
Immediately
Previous
Previous
STK[99]
STK[0]
·
·
·
·
CCR
PC
STK[100];
sp
(1)
Previous
Previous
Inside interrupt
function
STK SP
STK[0]
·
·
·
·
CCR
PC
(1)
(2)
sp
(2)
Interrupt termination
(immediately before
TRAPA instruction)
Previous
Previous
CCR
PC