HD64F38024DV Renesas Electronics America, HD64F38024DV Datasheet - Page 224

• Manufacturer Part Number: HD64F38024DV
• Description: IC H8/SLP MCU FLASH 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300L SLPr

Specifications of HD64F38024DV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: SCI
• Peripherals: LCD, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(3) Tables for section initialization (DTBL, BTBL)
Note: Be sure to compile the above program as a C language program, i.e., either make the file
210
#ifdef _ _ABS16_ _
#pragma abs16 section
#else
#pragma section
#endif
The section initialization routine (_INITSCT) initializes any uninitialized data sections to zero,
and copies initialization data in for initialized data sections in ROM to RAM. Here the starting
and ending addresses of sections which is read by the _INITSCT function are set in the table
for section initialization using the section address operator.
Section names in the section initialization table are declared, using C$BSEC for uninitialized
data areas, and C$DSEC for initialized data areas.
A code example is shown below.
#ifdef __ABS16__
#pragma abs16 section $DSEC
#else
#pragma section $DSEC
#endif
static const struct DSEC{
}DTBL[]={
};
#ifdef _ _ABS16_ _
#pragma abs16 section $BSEC
#else
#pragma section $BSEC
#endif
static const struct BSEC{
}BTBL[]={
};
extension “c” or specify the lang=c option. If the program is compiled as a C++ program
(i.e., either the file extension is “cpp”, “cc” or “cp”, or the lang=cpp option is specified),
the table for section initialization will be deleted as an unused static data by the compiler
and the program will be wrong.
void * rom_s;
void * rom_e;
void * ram_s;
{_ _sectop (“D”), _ _secend (“D”), _ _sectop (“R”)},
{_ _sectop (“$ABS8D”), _ _secend (“$ABS8D”), _ _sectop (“$ABS8R”)},
{_ _sectop (“$ABS16D”), _ _secend (“$ABS16D”), _ _sectop (“$ABS16R”)}
void * b_s;
void * b_e;
{_ _sectop (“B”), _ _secend (“B”)},
{_ _sectop (“$ABS8B”), _ _secend (“$ABS8B”)},
{_ _sectop (“$ABS16B”), _ _secend (“$ABS16B”)}
// Section name is C$DSEC.
// Start address member of the initialization data section in ROM
// End address member of the initialization data section in ROM
// Start address member of initialization data section in RAM
// Section name is C$BSEC.
// Start address member of uninitialized data section
// End address member of uninitialized data section