HD64F38024DV Renesas Electronics America, HD64F38024DV Datasheet - Page 696

• Manufacturer Part Number: HD64F38024DV
• Description: IC H8/SLP MCU FLASH 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300L SLPr

Specifications of HD64F38024DV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: SCI
• Peripherals: LCD, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

682
CPU/Operating Mode
H8SX normal mode
H8S/2600 normal mode
H8S/2000 normal mode
H8/300H normal mode
H8/300
H8/300L
Relative Address Format: Boundary alignment value is set.
The linkage editor will adjust the start address of the section to be the
multiple of the boundary alignment value.
The values allowed for the boundary alignment value are powers of 2
The assembler provides a default section for the following cases:
H8SX maximum mode
H8SX advanced mode
H8SX middle mode
H8S/2600 advanced mode
H8S/2000 advanced mode
H8/300H advanced mode
The use of executable instructions when no section has been declared.
The use of data reservation assembler directives when no section has
been declared.
The use of the .ALIGN directive when no section has been declared.
The use of the .ORG directive when no section has been declared.
Reference to the location counter when no section has been declared.
H8SXN
2600N
2000N
300HN
300
300L
H8SXX[:32]
H8SXX:28
H8SXA:32
H8SXA:28
H8SXA[:24]
H8SXA:20
H8SXM[:24]
H8SXM:20
2600A:32
2600A:28
2600A[:24]
2600A:20
2000A:32
2000A:28
2000A[:24]
2600A:20
300HA[:24]
300HA:20
H’0000FFFF
H’0000FFFF
H’0000FFFF
Maximum Value
H’FFFFFFFF
H’0FFFFFFF
H’FFFFFFFF
H’0FFFFFFF
H’00FFFFFF
H’000FFFFF
H’00FFFFFF
H’000FFFFF
H’0000FFFF
H’FFFFFFFF
H’0FFFFFFF
H’00FFFFFF
H’000FFFFF
H’0000FFFF
H’FFFFFFFF
H’0FFFFFFF
H’00FFFFFF
H’000FFFFF
H’0000FFFF
H’00FFFFFF
H’000FFFFF