HD64F38024DV Renesas Electronics America, HD64F38024DV Datasheet - Page 33
HD64F38024DV
Manufacturer Part Number
HD64F38024DV
Description
IC H8/SLP MCU FLASH 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300L SLPr
Datasheets
1.US38024-BAG1.pdf
(684 pages)
2.DF36012GFYV.pdf
(1021 pages)
3.DF38102HV.pdf
(145 pages)
Specifications of HD64F38024DV
Core Processor
H8/300L
Core Size
8-Bit
Speed
10MHz
Connectivity
SCI
Peripherals
LCD, PWM, WDT
Number Of I /o
51
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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ALign, NOALign: Boundary Alignment Value and Disable of Boundary Alignment
C/C++ <Object>[Group by alignment :]
When this option is not specified, the compiler assumes that template=auto is specified.
Remarks
When a code = asmcode is specified, template=static is always valid.
Command Line Format
ALign [=4]
NOALign
Description
The noalign option allocates defined variables in the order of declaration.
The align option relocates variables so as to reduce space by boundary alignment. When the
relocation is performed, generally the empty area is reduced and the object size is also reduced.
The align=4 option divides a data section into a 4-byte boundary alignment section, a 2-byte
boundary alignment section and a 1-byte boundary alignment section. A datum whose size is a
multiple of 4 is generated into a 4-byte boundary alignment section, whose section name is the
original section name with $4 postfixed. When the CPU type is H8SX, the speed of access to a
4-byte datum aligned on a 4-byte boundary address is improved.
A datum whose size is odd is generated into a 1-byte boundary alignment section, whose
section name is the original section name with $1 postfixed. This can reduce the empty area.
The remaining data whose size is even and is not a multiple of 4 remains in the original section.
If the section name is changed by #pragma section or the section option, $4 or $1 will be
appended to the changed section name.
When this option is not specified, align is assumed.
Remarks
When the CPU type is not H8SX, align=4 cannot be specified.
To locate the 1-byte or 4-byte data section at specific addresses with align=4 specified, each
section needs to be explicitly specified with the start option of the optimizing linkage editor.
In order to remain the boundary data construction unchanged, specify noalign.
19
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