HD64F38024DV Renesas Electronics America, HD64F38024DV Datasheet - Page 834

• Manufacturer Part Number: HD64F38024DV
• Description: IC H8/SLP MCU FLASH 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300L SLPr

Specifications of HD64F38024DV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: SCI
• Peripherals: LCD, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

C1308 (W) 'speed=loop' option ignored
The speed=loop option is specified when no optimization is specified. The speed=loop option is
ignored.
C1310 (W) 'goptimize' option ignored
The goptimize option is specified when assembly source program output is specified. The
goptimize option is ignored.
C1311 (W) 'cmncode' option ignored
The cmncode option is specified when no optimization is specified. The cmncode option is
ignored.
C1313 (W) Invalid SBR value
A value other than zero is specified for the lower eight bits in the sbr option. Ignores the
specification of the lower eight bits.
C1314 (W) 'ecpp' option ignored
The ecpp option is specified when the C++ exception processing functions are enabled. The ecpp
option is ignored.
C1315 (W) 'noregexpansion' option ignored
The noregexpansion option is specified when the CPU type is H8SX or H8S (withtout legacy=v4
option). The noregexpansion option is ignored.
C1316 (W) 'cmncode' option ignored
The cmncode option is specified when the CPU type is H8SX or H8S (withtout legacy=v4 option).
The cmncode option is ignored.
C1318 (W) 'align=4' option ignored
The align=4 option is specified when the CPU type is not H8SX. The align=4 option is ignored.
C1319 (W) 'speed=intrinsic' option ignored
The speed=intrinsic option is specified when the CPU type is not H8SX. The speed=intrinsic
option is ignored.
C1321 (W) 'sbr' option ignored
The sbr option is specified when the CPU type is not H8SX. The sbr option is ignored.
C1322 (W) 'volatile_loop' option ignored
The volatile_loop option is specified when the CPU type is not H8SX or H8S (withtout legacy=v4
option). The volatile_loop option is ignored.
820