DEMO9S08EL32 Freescale Semiconductor, DEMO9S08EL32 Datasheet - Page 149

• Manufacturer Part Number: DEMO9S08EL32
• Description: BOARD DEMO FOR 9S08 EL MCU
• Manufacturer: Freescale Semiconductor
• Type: MCUr

Specifications of DEMO9S08EL32

• Contents: Evaluation Board
• Processor To Be Evaluated: MC9S08EL32
• Data Bus Width: 8 bit
• Interface Type: RS-232, USB
• Operating Supply Voltage: 12 V
• Silicon Manufacturer: Freescale
• Core Architecture: HCS08
• Core Sub-architecture: HCS08
• Silicon Core Number: MC9S08
• Silicon Family Name: S08EL
• Rohs Compliant: Yes
• For Use With/related Products: MC9S08EL32
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

10.3.8
Freescale Semiconductor
The pin control registers are used to disable the I/O port control of MCU pins used as analog inputs.
APCTL1 is used to control the pins associated with channels 0–7 of the ADC module.
ADPC7
ADPC6
ADPC5
ADPC4
ADPC3
ADPC2
Field
7
6
5
4
3
2
Reset:
W
R
Pin Control 1 Register (APCTL1)
ADC Pin Control 7 — ADPC7 is used to control the pin associated with channel AD7.
0 AD7 pin I/O control enabled
1 AD7 pin I/O control disabled
ADC Pin Control 6 — ADPC6 is used to control the pin associated with channel AD6.
0 AD6 pin I/O control enabled
1 AD6 pin I/O control disabled
ADC Pin Control 5 — ADPC5 is used to control the pin associated with channel AD5.
0 AD5 pin I/O control enabled
1 AD5 pin I/O control disabled
ADC Pin Control 4 — ADPC4 is used to control the pin associated with channel AD4.
0 AD4 pin I/O control enabled
1 AD4 pin I/O control disabled
ADC Pin Control 3 — ADPC3 is used to control the pin associated with channel AD3.
0 AD3 pin I/O control enabled
1 AD3 pin I/O control disabled
ADC Pin Control 2 — ADPC2 is used to control the pin associated with channel AD2.
0 AD2 pin I/O control enabled
1 AD2 pin I/O control disabled
ADPC7
7
0
ADICLK
MC9S08EL32 Series and MC9S08SL16 Series Data Sheet, Rev. 3
00
01
10
11
ADPC6
0
Table 10-9. APCTL1 Register Field Descriptions
6
Figure 10-11. Pin Control 1 Register (APCTL1)
Bus clock
Bus clock divided by 2
Alternate clock (ALTCLK)
Asynchronous clock (ADACK)
ADPC5
Table 10-8. Input Clock Select
0
5
ADPC4
Selected Clock Source
0
4
Description
ADPC3
0
3
ADPC2
Analog-to-Digital Converter (S08ADC10V1)
0
2
ADPC1
0
1
ADPC0
0
0
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