dsPIC33FJ09GS302-E/SS Microchip Technology, dsPIC33FJ09GS302-E/SS Datasheet - Page 9

• Manufacturer Part Number: dsPIC33FJ09GS302-E/SS
• Description: Digital Signal Processors & Controllers - DSP, DSC 40 MIPS 9 KB FL 1024Bytes RAM SMPS
• Manufacturer: Microchip Technology

Specifications of dsPIC33FJ09GS302-E/SS

• Rohs: yes
• Core: dsPIC33F
• Data Bus Width: 16 bit
• Program Memory Size: 9 KB
• Data Ram Size: 1 KB
• Device Million Instructions Per Second: 40 MIPs
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 125 C
• Package / Case: SSOP-28
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C

3.3.2
The REGOUT control code allows for data to be extracted
from the device in ICSP mode. It is used to clock the con-
tents of the VISI register out of the device over the
PGEDx pin. After the REGOUT control code is received,
the CPU is held Idle for eight cycles. After these eight
cycles, an additional 16 cycles are required to clock the
data out (see
FIGURE 3-5:
© 2011 Microchip Technology Inc.
PGECx
dsPIC33F DEVICES WITH VOLATILE CONFIGURATION BITS
PGEDx
Fetch REGOUT Control Code
Execute Previous Instruction,
REGOUT SERIAL INSTRUCTION
EXECUTION
Figure
1
1
2
PGEDx = Input
3-5).
0
3
REGOUT SERIAL EXECUTION
4
0
0
P4
1
CPU Held in Idle
2
7
8
P5
1
LSb
2
1
3
2
Shift Out VISI Register<15:0>
4
3
The REGOUT code is unique because the PGEDx pin is
an input when the control code is transmitted to the
device. However, after the control code is processed,
the PGEDx pin becomes an output as the VISI register
is shifted out.
5
Note:
4
PGEDx = Output
6
...
11
10
The device will latch input PGEDx data on
the rising edge of PGECx and will output
data on the PGEDx line on the rising edge
of PGECx. For all data transmissions, the
Least Significant bit (LSb) is transmitted
first.
12
11
13
12
14
13
15 16
14
MSb
P4a
No Execution Takes Place,
Fetch Next Control Code
1
PGEDx = Input
0
2
DS70659B-page 9
0
3
0
4
0