dsPIC33FJ09GS302-E/SS Microchip Technology, dsPIC33FJ09GS302-E/SS Datasheet - Page 10

• Manufacturer Part Number: dsPIC33FJ09GS302-E/SS
• Description: Digital Signal Processors & Controllers - DSP, DSC 40 MIPS 9 KB FL 1024Bytes RAM SMPS
• Manufacturer: Microchip Technology

Specifications of dsPIC33FJ09GS302-E/SS

• Rohs: yes
• Core: dsPIC33F
• Data Bus Width: 16 bit
• Program Memory Size: 9 KB
• Data Ram Size: 1 KB
• Device Million Instructions Per Second: 40 MIPs
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 125 C
• Package / Case: SSOP-28
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C

dsPIC33F DEVICES WITH VOLATILE CONFIGURATION BITS
3.4
3.4.1
Flash memory write and erase operations are
controlled by the NVMCON register. Programming is
performed by setting NVMCON to select the type of
erase
(Table
the WR control bit (NVMCON<15>).
In ICSP mode, all programming operations are
self-timed. There is an internal delay between the user
setting the WR control bit and the automatic clearing of
the WR control bit when the programming operation is
complete. Please refer to
acteristics and Timing Requirements”
information about the delays associated with various
programming operations.
TABLE 3-2:
TABLE 3-3:
DS70659B-page 10
NVMCON
0x404F
0x404D
0x4042
0x4003
NVMCON
Value
Value
3-3) and initiating the programming by setting
operation
Flash Memory Programming in
ICSP Mode
PROGRAMMING OPERATIONS
Erase code memory or executive memory
(does not erase Device ID registers)
Erase General Segment memory
Erase a page of program memory
Program a code memory word
NVMCON ERASE OPERATIONS
NVMCON WRITE OPERATIONS
(Table
Erase Operation
Write Operation
Section 9.0 “AC/DC Char-
3-2)
or
write
for detailed
operation
3.4.2
The WR bit (NVMCON<15>) is used to start an erase
or write cycle. Setting the WR bit initiates the
programming cycle.
All erase and write cycles are self-timed. The WR bit
should be polled to determine if the erase or write cycle
has been completed. Starting a programming cycle is
performed as follows:
BSET
STARTING AND STOPPING A
PROGRAMMING CYCLE
NVMCON, #WR
© 2011 Microchip Technology Inc.