dsPIC33FJ09GS302-E/SS Microchip Technology, dsPIC33FJ09GS302-E/SS Datasheet - Page 20

• Manufacturer Part Number: dsPIC33FJ09GS302-E/SS
• Description: Digital Signal Processors & Controllers - DSP, DSC 40 MIPS 9 KB FL 1024Bytes RAM SMPS
• Manufacturer: Microchip Technology

Specifications of dsPIC33FJ09GS302-E/SS

• Rohs: yes
• Core: dsPIC33F
• Data Bus Width: 16 bit
• Program Memory Size: 9 KB
• Data Ram Size: 1 KB
• Device Million Instructions Per Second: 40 MIPs
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 125 C
• Package / Case: SSOP-28
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C

dsPIC33F DEVICES WITH VOLATILE CONFIGURATION BITS
3.10
The verify step involves reading back the code memory
space and comparing it against the copy held in the
programmer’s buffer. The Configuration words are
verified with the rest of the code.
The verify process is illustrated in
word of the instruction is read, and then the lower byte
of the upper word is read and compared against the
instruction stored in the programmer’s buffer. Refer to
Section 3.8
implementation details of reading code memory.
FIGURE 3-8:
DS70659B-page 20
Note:
No
Verify Code Memory and
Configuration Bits
Because the Configuration bytes include
the device code protection bit, code mem-
ory should be verified immediately after
writing, if the code protection is to be
enabled. This is because the device will
not be readable or verifiable if a device
Reset occurs after the code-protect bit
has been cleared.
with Post-Increment
with Post-Increment
“Reading
Set TBLPTR = 0
Instruction Word
Read Low Word
Read High Byte
code memory
= Expected
verified?
Data?
Does
Start
End
VERIFY CODE
MEMORY FLOW
All
Yes
Yes
Code
Figure
No
Report Error
Memory”
3-8. The lower
Failure
for
3.11
Exiting Program/Verify mode is done by removing V
from MCLR, as illustrated in
requirement for exit is that an interval P16 should
elapse between the last clock and program signals on
PGECx and PGEDx before removing V
FIGURE 3-9:
PGEDx
PGECx
MCLR
V
DD
Exiting ICSP Mode
PGEDx = Input
EXITING ICSP™ MODE
© 2011 Microchip Technology Inc.
V
P16
IH
Figure
P17
V
IH
IH
3-9. The only
.
IH