dsPIC33FJ09GS302-E/SS Microchip Technology, dsPIC33FJ09GS302-E/SS Datasheet - Page 45

• Manufacturer Part Number: dsPIC33FJ09GS302-E/SS
• Description: Digital Signal Processors & Controllers - DSP, DSC 40 MIPS 9 KB FL 1024Bytes RAM SMPS
• Manufacturer: Microchip Technology

Specifications of dsPIC33FJ09GS302-E/SS

• Rohs: yes
• Core: dsPIC33F
• Data Bus Width: 16 bit
• Program Memory Size: 9 KB
• Data Ram Size: 1 KB
• Device Million Instructions Per Second: 40 MIPs
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 125 C
• Package / Case: SSOP-28
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C

8.0
Checksums for the devices listed below are 16 bits in
size. The checksum is calculated by summing the
following:
• Contents of code memory locations
• Contents of Configuration words
All memory locations are summed one byte at a time
using only their native data size. Configuration bytes
are summed by adding the lower two bytes of these
locations (the upper byte is ignored), while code
memory is summed by adding all three bytes of code
memory.
Table 8-1
the dsPIC33FJ16MC102 device.
TABLE 8-1:
Table 8-2
dsPIC33FJ16GP/MC10X devices.
TABLE 8-2:
Table 8-3
dsPIC33FJ06GS001,
dsPIC33FJ09GS302 devices.
TABLE 8-3:
© 2011 Microchip Technology Inc.
dsPIC33FJ16MC102
Item Description:
SUM(a:b) = Byte sum of locations a to b inclusive (all 3 bytes of code memory)
CFGB = Configuration block (masked) = Byte sum of (CONFIG1 & 0x3FFF + CONFIG2 & 0xFFFF)
CFGB = Configuration block (masked) = Byte sum of ((0x7FFF & 0x3FFF) + (0xFFFF & 0xFFFF))
dsPIC33FJ16GP101
dsPIC33FJ16GP102
dsPIC33FJ16MC101
dsPIC33FJ16MC102
dsPIC33FJ06GS001
dsPIC33FJ06GS101A
dsPIC33FJ06GS102A
dsPIC33FJ06GS202A
dsPIC33FJ09GS302
dsPIC33F DEVICES WITH VOLATILE CONFIGURATION BITS
Device:
Device
CHECKSUM COMPUTATION
Device
is an example of the checksum calculation for
describes the Configuration bit masks for the
describes the configuration bit masks for the
CHECKSUM COMPUTATION EXAMPLE
dsPIC33FJ16GP/MC10X
CONFIGURATION BIT MASKS
dsPIC33FJ06GS001, dsPIC33FJ06GSX0XA, AND dsPIC33FJ09GS302
CONFIGURATION BIT MASKS
dsPIC33FJ06GSX0XA,
Disabled
Enabled
CONFIG2
0xFFFF
0xFFFF
0xFFFF
0xFFFF
Read Code
Protection
FICD
0xA3
0xA3
0xA3
0xA3
0xA3
CONFIG1
0x3FFF
0x3FFF
0x3FFF
0x3FFF
CFGB + SUM(0:0x002BFA)
Reads of PM return 0x00
Checksum Computation
FWDT
0xBF
0xBF
0xBF
0xBF
0xBF
and
FOSC
0xE7
0xE7
0xE7
0xE7
0xE7
0xF804
0x0000
Erased
Value
FOSCSEL
0x87
0x87
0x87
0x87
0x87
0xAAAAAA at 0x0
Code Address
Value with
DS70659B-page 45
and Last
0xF606
0x0000
0x03
0x03
0x03
0x03
0x03
FGS