dsPIC33FJ09GS302-E/SS Microchip Technology, dsPIC33FJ09GS302-E/SS Datasheet - Page 5

• Manufacturer Part Number: dsPIC33FJ09GS302-E/SS
• Description: Digital Signal Processors & Controllers - DSP, DSC 40 MIPS 9 KB FL 1024Bytes RAM SMPS
• Manufacturer: Microchip Technology

Specifications of dsPIC33FJ09GS302-E/SS

• Rohs: yes
• Core: dsPIC33F
• Data Bus Width: 16 bit
• Program Memory Size: 9 KB
• Data Ram Size: 1 KB
• Device Million Instructions Per Second: 40 MIPs
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 125 C
• Package / Case: SSOP-28
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C

2.4.2
The Configuration bits control the code protection
features, with two forms of code protection being
provided. One form prevents code memory from being
written (write protection) and the other prevents code
memory from being read (i.e., read protection).
The GWRP bit (CONFIG1<12>) controls write protec-
tion and the GCP bit (CONFIG1<13>) controls read
protection. Protection is enabled when the respective
bit is ‘0’.
Erasing sets GWRP and GCP to ‘1’, which allows the
device to be programmed.
When write protection is enabled (GWRP = 0), any
programming operation to code memory will fail.
When read protection is enabled (GCP = 0), any read
from code memory will cause a 0x0 to be read, regard-
less of the actual contents of code memory. Since the
programming executive always verifies what it pro-
grams, attempting to program code memory with read
protection enabled also will result in failure.
© 2011 Microchip Technology Inc.
dsPIC33F DEVICES WITH VOLATILE CONFIGURATION BITS
CODE-PROTECT CONFIGURATION
BITS
It is imperative that both GWRP and GCP are ‘1’ while
the device is being programmed and verified. Only after
the device is programmed and verified should either
GWRP or GCP be programmed to ‘0’ (see
“Configuration
Note 1: Bulk Erasing the program memory is the
2: Performing a page erase operation on
3: If the General Segment Code-Protect bit
only way to reprogram code-protect bits
from an ON state (‘0’) to an OFF state
(‘1’).
the last page of program memory clears
the Flash Configuration words, enabling
code protection as a result. Therefore,
users should avoid performing page
erase operations on the last page of
program memory.
(GCP) is programmed to ‘0’, code mem-
ory is code-protected and can not be
read. Code memory must be read and
verified before enabling read protection.
See
figuration Bits”
about code-protect Configuration bits,
and
and Configuration Bits”
about
memory and Configuration Words and
Bytes
Bits”).
Section 3.10 “Verify Code Memory
Section 2.4.2 “Code-Protect Con-
reading
for detailed information
and
verifying
DS70659B-page 5
for details
Section 2.4
code