cp3cn17 National Semiconductor Corporation, cp3cn17 Datasheet - Page 74

• Manufacturer Part Number: cp3cn17
• Description: Reprogrammable Connectivity Processor With Can Interface
• Manufacturer: National Semiconductor Corporation

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15.2.4
Bit Error
A CAN device which is currently transmitting also monitors
the bus. If the monitored bit value is different from the trans-
mitted bit value, a bit error is detected. However, the recep-
tion of a “dominant” bit instead of a “recessive” bit during the
transmission of a passive error flag, during the stuffed bit
stream of the arbitration field, or during the acknowledge
slot is not interpreted as a bit error.
Stuff Error
A stuff error is detected if 6 consecutive bits occur without a
state change in a message field encoded with bit stuffing.
Form Error
A form error is detected, if a fixed frame bit (e.g., CRC de-
limiter, ACK delimiter) does not have the specified value. For
Synchronize
Once the CAN module is enabled, it waits for 11 consecu-
tive recessive bits to synchronize with the bus. After that, the
CAN module becomes error active and can participate in
Error Types
Enable CR16CAN
External Reset or
r
r
ANY FRAME
ERROR
ACTIVE
INT = Intermission
Suspend Transmission is only for error passive nodes.
SYNC
r
11 consecutive 'recessive" bits
received
128 occurrences of
11 consecutive 'recessive" bits
r
r
r
r
(TEC OR REC) > 95
(TEC AND REC) < 96
r
INT
3
r
r
Figure 20. Interframe Space
r
Figure 21. Bus States
r
TRANSMIT
r
SUSPEND
INTERFRAME SPACE
r
8
r
WARNING
ERROR
r
74
r
a receiver, a “dominant” bit during the last bit of End of
Frame does not constitute a frame error.
Bit CRC Error
A CRC error is detected if the remainder from the CRC cal-
culation of a received CRC polynomial is non-zero.
Acknowledgment Error
An acknowledgment error is detected whenever a transmit-
ting node does not get an acknowledgment from any other
node (i.e., when the transmitter does not receive a “domi-
nant” bit during the ACK frame).
Error States
The device can be in one of five states with respect to error
handling (see Figure 21).
the bus communication. This state must also be entered af-
ter waking-up the device using the Multi-Input Wake-Up fea-
ture. See System Start-Up and Multi-Input Wake-Up on
page 99.
r
r
(TEC OR REC) > 127
(TEC AND REC) < 128
Bus Idle
r
r
r
d
REMOTE FRAME
DATA FRAME OR
PASSIVE
ERROR
BUS
OFF
Note:
d = dominant
r = recessive
TEC > 255
DS027
DS026