cp3cn17 National Semiconductor Corporation, cp3cn17 Datasheet - Page 131

• Manufacturer Part Number: cp3cn17
• Description: Reprogrammable Connectivity Processor With Can Interface
• Manufacturer: National Semiconductor Corporation

18.4
The UART baud rate is determined by the System Clock fre-
quency and the values in the UOVR, UPSR, and UBAUD
registers. Unless the System Clock is an exact multiple of
the baud rate, there will be a small amount of error in the re-
sulting baud rate.
18.4.1
The equation to calculate the baud rate in asynchronous
mode is:
where BR is the baud rate, SYS_CLK is the System Clock,
O is the oversample rate, N is the baud rate divisor + 1, and
P is the prescaler divisor selected by the UPSR register.
Assuming a System Clock of 5 MHz, a desired baud rate of
9600, and an oversample rate of 16, the N × P term accord-
ing to the equation above is:
The N × P term is then divided by each Prescaler Factor
from Table 56 to obtain a value closest to an integer. The
factor for this example is 6.5.
The baud rate register is programmed with a baud rate divi-
sor of 4 (N = baud rate divisor + 1). This produces a baud
clock of:
Note that the percent error is much lower than would be pos-
sible without the non-integer prescaler factor. Error greater
than 3% is marginal and may result in unreliable operation.
Refer to Table 58 below for more examples.
Asynchronous Mode
BAUD RATE CALCULATIONS
%error
BR
N P
N
×
=
=
32.552
----------------- -
=
-----------------------------------
(
BR
=
16 5
6.5
(
------------------------------------------------ -
(
------------------------------ -
(
9615.385 9600
5
×
16
=
(
×10
5
×
----------------------------- -
(
×10
SYS_CLK
×
=
O N
6
9600
9600
6.5
)
5.008 (N = 5)
×
6
)
)
–
)
×
=
=
P
9615.385
)
32.552
)
=
0.16
131
18.4.2
When synchronous mode is selected and the UCKS bit is
set, the UART operates from a clock received on the CKX
pin. When the UCKS bit is clear, the UART uses the clock
from the internal baud rate generator which is also driven on
the CKX pin. When the internal baud rate generator is used,
the equation for calculating the baud rate is:
where BR is the baud rate, SYS_CLK is the System Clock,
N is the value of the baud rate divisor + 1, and P is the pres-
caler divide factor selected by the value in the UPSR regis-
ter. Oversampling is not used in synchronous mode.
Use the same procedure to determine the values of N and
P as in the asynchronous mode. In this case, however, only
integer prescaler values are allowed.
Synchronous Mode
BR
=
SYS_CLK
---------------------------- -
(
2
×
N P
×
)
www.national.com