cp3cn17 National Semiconductor Corporation, cp3cn17 Datasheet - Page 40

• Manufacturer Part Number: cp3cn17
• Description: Reprogrammable Connectivity Processor With Can Interface
• Manufacturer: National Semiconductor Corporation

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8.5.19
The FMAR2 register is a word-wide read-only register,
which is loaded during reset. It is used to build the Code
Area start address. At reset, the CPU executes a branch,
using the contents of the FMAR2 register as displacement.
The CPU bus master has read-only access to this register.
The FSMAR2 register has the same value as the FMAR2
register.
CADR8:0
CADR12:9
CADR15:13
15
7
CADR15:13
FSMAR2)
Flash Memory Auto-Read Register 2 (FMAR2/
The Code Area Start Address (bits 8:0) con-
tains the lower 9 bits of the Code Area start
address. The CADR8:0 field has a fixed value
of 0.
The Code Area Start Address (bits 12:9) are
loaded during reset with the inverted value of
BOOTAREA3:0.
The Code Area Start Address (bits 15:13)
contains the upper 3 bits of the Code Area
start address. The CADR15:13 field has a
fixed value of 0.
13
CADR7:0
12
CADR12:8
9
CADR8
8
0
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