cp3cn17 National Semiconductor Corporation, cp3cn17 Datasheet - Page 134

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cp3cn17

Manufacturer Part Number
cp3cn17
Description
Reprogrammable Connectivity Processor With Can Interface
Manufacturer
National Semiconductor Corporation
Datasheet

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19.0 Microwire/SPI Interface
Microwire/Plus is a synchronous serial communications
protocol, originally implemented in National Semiconduc-
tor's COP8
mize the number of connections, and therefore the cost, of
communicating with peripherals.
The enhanced Microwire interface module includes the fol-
lowing features:
19.1
The Microwire interface allows several devices to be con-
nected on one three-wire system. At any given time, one of
these devices operates as the master while all other devices
operate as slaves. The Microwire interface allows the device
to operate either as a master or slave transferring 8- or 16-
bits of data.
The master device supplies the synchronous clock (MSK)
for the serial interface and initiates the data transfer. The
slave devices respond by sending (or receiving) the re-
quested data. Each slave device uses the master’s clock for
serially shifting data out (or in), while the master shifts the
data in (or out).
Lines
I/O
Programmable operation as a Master or Slave
Programmable shift-clock frequency (master only)
Programmable 8- or 16-bit mode of operation
8- or 16-bit serial I/O data shift register
Two modes of clocking data
Serial clock can be low or high when idle
16-bit read buffer
Busy bit, Read Buffer Full bit, and Overrun bit for polling
and as interrupt sources
Supports multiple masters
Maximum bit rate of 10M bits/second (master mode) 5M
bits/second (slave mode) at 20 MHz System Clock
Supports very low-end slaves with the Slave Ready out-
put
Echo back enable/disable (Slave only)
MICROWIRE OPERATION
®
and HPC families of microcontrollers to mini-
Master
MDIDO
MDODI
GPIO
MSK
DO
8-Bit
A/D
CS
SK
DI
Figure 61. Microwire Interface
DO
EEPROM
1K Bit
CS
SK
DI
134
The CP3CN17 has an enhanced Microwire/SPI interface
module (MWSPI) that can communicate with all peripherals
that conform to Microwire or Serial Peripheral Interface
(SPI) specifications. This enhanced Microwire interface is
capable of operating as either a master or slave and in 8- or
16-bit mode. Figure 61 shows a typical enhanced Microwire
interface application.
The three-wire system includes: the serial data in signal
(MDIDO for master mode, MDODI for slave mode), the se-
rial data out signal (MDODI for master mode, MDIDO for
slave mode), and the serial clock (MSK).
In slave mode, an optional fourth signal (MWCS) may be
used to enable the slave transmit. At any given time, only
one slave can respond to the master. Each slave device has
its own chip select signal (MWCS) for this purpose.
Figure 62 shows a block diagram of the enhanced Microwire
serial interface in the device.
Display
Driver
LCD
CS
SK
DI
Display
Driver
CS
VF
SK
DI
MWCS
MDIDO
MDODI
MSK
Slave
DS067
I/O
Lines

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