cp3cn17 National Semiconductor Corporation, cp3cn17 Datasheet - Page 160

• Manufacturer Part Number: cp3cn17
• Description: Reprogrammable Connectivity Processor With Can Interface
• Manufacturer: National Semiconductor Corporation

www.national.com
22.5
Table 65 lists the CPU-accessible registers used to control
the Multi-Function Timers.
22.5.1
The TPRSC register is a byte-wide, read/write register that
holds the current value of the 5-bit clock prescaler (CLKPS).
This register is cleared on reset. The register format is
shown below.
CLKPS
7
TPRSC
TCNT1
TCNT2
TCTRL
TICLR
Name
TCKC
TCRA
TCRB
TICTL
Reserved
Table 65 Multi-Function Timer Registers
TIMER REGISTERS
Clock Prescaler Register (TPRSC)
The Clock Prescaler field specifies the divisor
used to generate the Timer Clock from the
System Clock. When the timer is configured to
use the prescaled clock, the System Clock is
divided by (CLKPS + 1) to produce the timer
clock. Therefore, the System Clock divisor
can range from 1 to 32.
5
FF FF4Ah
FF FF4Ch
FF FF4Eh
FF FF48h
FF FF40h
FF FF46h
FF FF42h
FF FF44h
FF FF50h
Address
4
CLKPS
Clock Unit Control
Reload/Capture A
Reload/Capture B
Timer/Counter 1
Timer/Counter 2
Control Register
Control Register
Clock Prescaler
Timer Interrupt
Timer Interrupt
Clear Register
Description
Timer Mode
Register
Register
Register
Register
Register
Register
0
160
22.5.2
The TCKC register is a byte-wide, read/write register that
selects the clock source for each timer/counter. Selecting
the clock source also starts the counter. This register is
cleared on reset, which disables the timer/counters. The
register format is shown below.
C1CSEL
C2CSEL
* Operation of the Slow Clock is determined by the CRC-
TRL.SCLK control bit, as described in Section 11.8.1.
22.5.3
The TCNT1 register is a word-wide, read/write register that
holds the current count value for Timer/Counter 1. The reg-
ister contents are not affected by a reset and are unknown
after power-up.
22.5.4
The TCNT2 register is a word-wide, read/write register that
holds the current count value for Timer/Counter 2. The reg-
ister contents are not affected by a reset and are unknown
after power-up.
15
15
Reserved
7
Clock Unit Control Register (TCKC)
Timer/Counter 1 Register (TCNT1)
Timer/Counter 2 Register (TCNT2)
6
The Counter 1 Clock Select field specifies the
clock mode for Timer/Counter 1 as follows:
000 – No clock (Timer/Counter 1 stopped,
001 – Prescaled System Clock.
010 – External event on TB (modes 1 and 3
011 – Pulse-accumulate mode based on TB
100 – Slow Clock.*
101 – Reserved.
110 – Reserved.
111 – Reserved.
The Counter 2 Clock Select field specifies the
clock mode for Timer/Counter 2 as follows:
000 – No clock (Timer/Counter 2 stopped,
001 – Prescaled System Clock.
010 – External event on TB (modes 1 and 3
011 – Pulse-accumulate mode based on TB
100 – Slow Clock*
101 – Reserved.
110 – Reserved.
111 – Reserved.
5
modes 1, 2, and 3 only).
only).
(modes 1 and 3 only).
modes 1, 2, and 3 only).
only).
(modes 1 and 3 only).
C2CSEL
TCNT1
TCNT2
3
2
C1CSEL
0
0
0