tmp88fw45afg TOSHIBA Semiconductor CORPORATION, tmp88fw45afg Datasheet - Page 57

• Manufacturer Part Number: tmp88fw45afg
• Description: 8 Bit Microcontroller Tlcs-870/x Series
• Manufacturer: TOSHIBA Semiconductor CORPORATION

5. Input/Output Ports
have a latch, so it is desirable that the input data be retained externally until it is read out, or read several times before
being processed. Figure 5-1 shows input/output timing.
execution. Because this timing cannot be recognized from the outside, transient input data such as chattering needs to
be dealt with in a program. The timing at which data is forwarded to input/output ports is S2 state in the write cycle
of instruction execution.
the oscillation frequency detection reset and all I/O pins become high impedance.
The TMP88FW45AFG contains 10 input/output ports comprised of 71 pins.
All output ports contain a latch, and the output data therefore are retained by the latch. But none of the input ports
The timing at which external data is read in from input/output ports is S1 state in the read cycle of instruction
If high frequency oscillation stops or becomes abnormal in NORMAL/IDLE mode, the TMP88FW45AFG generates
Note:The read/write cycle positions vary depending on instructions.
Port P0
Port P1
Port P2
Port P3
Port P4
Port P5
Port P6
Port P7
Port P8
Port P9
Data input
Output latch pulse
Data output
execution cycle
execution cycle
nput strobe
nstruction
nstruction
Primary Function
4-bit I/O port
8-bit I/O port
3-bit I/O port
8-bit I/O port
8-bit I/O port
8-bit I/O port
8-bit I/O port
8-bit I/O port
8-bit I/O port
8-bit I/O port
Figure 5-1 Example of Input/Output Timing
S0
S0
Timer/counter input, serial interface input/output, and high-speed PWM out-
put
External interrupt input, timer/counter input/output, divider output, and motor
control circuit input
External interrupt input, timer/counter input/output, and STOP mode release
signal input
Motor control input/output
Timer/counter output, serial interface input/output, motor control circuit input
and serial PROM mode control input
Motor control circuit input/output
Analog input and motor control circuit output
Analog input and motor control circuit output
Serial interface input/output
Fetch cycle
Fetch cycle
S1
S1
S2
S2
Page 43
S3
S3
Example: LD A, (x)
Example: LD (x), A
S0
S0
(b) Output timing
(a) nput timing
Fetch cycle
Fetch cycle
S1
S1
Secondary Functions
S2
S2
S3
S3
S0
S0
Read cycle
Write cycle
S1
S1
S2
S2
S3
S3
TMP88FW45AFG