tmp88fw45afg TOSHIBA Semiconductor CORPORATION, tmp88fw45afg Datasheet - Page 260

• Manufacturer Part Number: tmp88fw45afg
• Description: 8 Bit Microcontroller Tlcs-870/x Series
• Manufacturer: TOSHIBA Semiconductor CORPORATION

21.6
Operation Mode
14. The m’th + 1 through n’th - 2 bytes of the received data contain the binary data in the Intel Hex format.
15. The n’th - 1 and n’th bytes contain the checksum upper and lower bytes. For details on how to calculate
16. After transmitting the checksum, the device waits for the next operation command data.
data from the address specified by the password comparison start address. The external controller should
send N-byte password data to the device. If the passwords do not match, the device enters the halt
condition without returning an error code to the external controller. If the addresses from FFFE0H to
FFFFFH are filled with “FFH”, the passwords are not conpared because the device is considered as a
blank product.
No received data is echoed back to the external controller. After receiving the start mark (3AH for “:”)
in the Intel Hex format, the device starts data record reception. Therefore, the received data except 3AH
is ignored until the start mark is received. After receiving the start mark, the device receives the data
record, that consists of data length, address, record type, write data and checksum. Since the device
starts checksum calculation after receiving an end record, the external controller should wait for the
checksum after sending the end record. If a receiving error or Intel Hex format error occurs, the device
enters the halts condition without returning an error code to the external controller.
the SUM, refer to "21.8 Checksum (SUM)". The checksum is calculated only when the end record is
detected and no receiving error or Intel Hex format error occurs. After sending the end record, the
external controller judges whether the transmission is completed correctly by receiving the checksum
sent by the device.
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