tmp88fw45afg TOSHIBA Semiconductor CORPORATION, tmp88fw45afg Datasheet - Page 154

• Manufacturer Part Number: tmp88fw45afg
• Description: 8 Bit Microcontroller Tlcs-870/x Series
• Manufacturer: TOSHIBA Semiconductor CORPORATION

14.3
Position Detection Unit
14.3.1
Configuration of the position detection unit
・ The position detection unit is controlled by the Position Detection Control Register (PDCRA, PDCRB).
・ When unmatch detection mode is selected for position detection, the unit stores the sampled status of
・ In unmatch detection mode, the port status at start of sampling can be read (PDCRC<PDTCT>).
・ When starting and stopping position detection synchronously with the timer, position detection is started
・ Sampling mode can be selected from three modes available: mode where sampling is performed only
・ When sampling mode is selected for detecting position while the lower phases are conducting current,
After the position detection function is enabled, the unit starts sampling the position detection port with
Timer 2 or in software. For the case of ordinary mode, when the status of the position detection input
port matches the expected value of the PMD Output Register, the unit generates a position detection
interrupt and finishes sampling, waiting for start of the next sampling.
the position detection port in memory at the time it started sampling. When the port input status changes
from the status in which it was at start of sampling, an interrupt is generated.
by Timer 2 and position detection is stopped by Timer 3.
while PWM is on, mode where sensors such as Hall elements are sampled regularly, and mode where
sampling is performed while the lower side is conducting current (when performing sampling only
while PWM is on, DUTY must be set for all three phases in common).
sampling is performed for a period from when the set sampling delay time has elapsed after the lower
side started conducting current till when the current application is turned off. Sampling is performed
independently at each phase, and the sampling result is retained while sampling is idle. If while sampling
at some phase is idle, the input and the expected value at other phase being sampled match, position is
detected and an interrupt is generated.
Figure 14-4 Configuration of the Position Detection Circuit
Page 140
TMP88FW45AFG