tmp88fw45afg TOSHIBA Semiconductor CORPORATION, tmp88fw45afg Datasheet - Page 200

• Manufacturer Part Number: tmp88fw45afg
• Description: 8 Bit Microcontroller Tlcs-870/x Series
• Manufacturer: TOSHIBA Semiconductor CORPORATION

15.9
Status Flag
15.9
15.9.1
15.9.2
15.9.3
Status Flag
UARTSR<PERR> is set to “1”. The UARTSR<PERR> is cleared to “0” when the RDBUF is read after reading
the UARTSR.
UARTSR<FERR> is cleared to “0” when the RDBUF is read after reading the UARTSR.
UARTSR<OERR> is set to “1”. In this case, the receive data is discarded; data in RDBUF are not affected. The
UARTSR<OERR> is cleared to “0” when the RDBUF is read after reading the UARTSR.
When parity determined using the receive data bits differs from the received parity bit, the parity error flag
When “0” is sampled as the stop bit in the receive data, framing error flag UARTSR<FERR> is set to “1”. The
When all bits in the next data are received while unread data are still in RDBUF, overrun error flag
RXD pin
UARTSR<FERR>
INTRXD interrupt
Shift register
Parity Error
Framing Error
Overrun Error
Shift register
RXD pin
UARTSR<PERR>
INTRXD interrupt
Figure 15-6 Generation of Framing Error
Figure 15-5 Generation of Parity Error
xxxx0 **
xxx0 **
Final bit
Parity
Page 186
pxxxx0
xxxx0
Stop
*
*
Stop
1pxxxx0
0xxxx0
After reading UARTSR then
RDBUF clears FERR.
After reading UARTSR then
RDBUF clears PERR.
TMP88FW45AFG