stlc5465 STMicroelectronics, stlc5465 Datasheet - Page 84

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stlc5465

Manufacturer Part Number
stlc5465
Description
Multi Hdlc With Switching Matrix Associated
Manufacturer
STMicroelectronics
Datasheet

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STLC5465B
VIII - INTERNAL REGISTERS (continued)
VIII.15 - Address Field Recognition Address Register - AFRAR (1C)H
The write operation is lauched when AFRAR is written by the microprocessor.
AMM
READ : READ ADDRESS FIELD RECOGNITION MEMORY
CH0/4 : These five bits define one of 32 channels in reception
VIII.16 - Address Field Recognition Data Register - AFRDR (1E)H
AF0/15 : ADDRESS FIELD BITS
AFM0/
15:
VIII.17 - Fill Character Register - FCR (20)H
FC0/7 : FILL CHARACTER (eight bits)
VIII.18 - GCI Channels Definition Register 0 - GCIR0 (22)H
The definitions of x and y indices are the same for GCIR0, GCIR1, GCIR2, GCIR3 :
- 0
- y = 0, TDM4 is selected
- y = 1, TDM5 is selected.
84/101
AFM15
AF15/
bit15
bit15
bit15
CH4
r
x
AFM14
AF14/
CH3
: Access to Mask Memory.
7, 1 of 8 GCI CHANNELS belonging to the same multiplex TDM4 or TDM5
e
AMM=1, Access to Address Field Recognition Mask Memory.
AMM=0, Access to Address Field Recognition Memory.
READ=1, READ AFR MEMORY.
READ=0, WRITE AFR MEMORY.
AF0/7 ; First byte received; AF8/15: Second byte received.
These two bytes are stored into Address Field Recognition Memory when AFRAR is written by
the microprocessor.
ADDRESS FIELD BIT MASK0/15 if AMM=1 (AMM bit of AFRAR)
AMF0/7. When AR10=1 (See HRCR) each bit of the first received byte is compared respectively
to AFx bit if AFMx=0. In case of mismatching, the received frame is ignored. If AFMx=1, no
comparison between AFx and the corresponding received bit.
AMF8/15. When AR20=1 (See HRCR) each bit of the second received byte is compared
respectively to AFy bit if AFMy=0. In case of mismatching, the received frame is ignored. If
AFMy=1, no comparison between AFy and the corresponding received bit.
These two bytes are stored into Address Field Recognition Mask Memory when AFRAR is written
by the microprocessor (AMM=1).
In Transparent Mode M1, two messages are separated by FILL CHARACTERS and the detection
of one FILL CHARACTER marks the end of a message.
AFM13
AF13/
CH2
s
AFM12
CH1
AF12/
e
AFM11
CHO
AF11/
r
AFM10
READ
AF10/
v
AFM9
AF9/
AMM
e
After reset (0000)
After reset (0001)
After reset (0000)
AFM8
AF8/
bit8
bit8
bit8
d
Nu
AFM7
AF7/
FC7
bit7
bit7
bit7
r
H
H
H
AFM6
FC6
AF6/
e
AFM5
FC5
AF5/
s
AFM4
AF4/
FC4
e
AFM3
FC3
AF3/
r
AFM2
AF2/
FC2
v
AFM1
FC1
AF1/
e
AFMO
bit 0
bit 0
AF0/
bit 0
FC0
d

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