stlc5465 STMicroelectronics, stlc5465 Datasheet - Page 49
stlc5465
Manufacturer Part Number
stlc5465
Description
Multi Hdlc With Switching Matrix Associated
Manufacturer
STMicroelectronics
Datasheet
1.STLC5465.pdf
(101 pages)
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V1 - MEMORY TIMING
VI.1 - Dynamic Memories
Figure 38 : Dynamic Memory Read Signals from the Multi-HDLC
Symbol
Tw
Th
Tz
Ts
T
a
Delay between Data Strobe from the mP and beginning of cycle
Delay between Masterclock and Edge of each signal delivered by the
MHDLC (30pF)
Delay between NCAS Falling Edge and NCAS rising Edge
Delay between NCAS Rising Edge and end of cycle
Set-up Time Data /NCAS Rising Edge
Hold Time Data/NCAS Rising Edge
Parameter
V
V
DD
DD
= 5V
= 3.3V
Min.
2/f
1/f
1/f
20
0
Typ.
20
30
Max.
STLC5465B
40
2/f
2/f
Unit
49/101
ns
ns
ns
ns
ns
ns