stlc5465 STMicroelectronics, stlc5465 Datasheet - Page 13

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stlc5465

Manufacturer Part Number
stlc5465
Description
Multi Hdlc With Switching Matrix Associated
Manufacturer
STMicroelectronics
Datasheet

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I - PIN INFORMATION (continued)
I.2 - Pin Description (continued)
Type : I1 = Input TTL ;
Note : D0/15 input/output pins must be connected to one single external pull up resistor if not used.
I.3 - Pin Definition
I.3.1 - Input Pin Definition
I1
I2
I3
I4
I.3.2 - Output Pin Definition
O4
O4T
O8
O8T
O8D : Output CMOS 8mA,Open Drain
O8DT : Output CMOS 8mA,Open Drain or Tristate (Programmable pin)
Moreover, each output is high impedance when the NTEST Pin is at 0 volt except XTAL2 Pin which is a
CMOS output.
I.3.3 - Input/Output Pin Definition
I/O : Input TTL/ Output CMOS 8mA.
N.B. XTAL1 : this input is CMOS.
MEMORY INTERFACE (continued)
Pin N°
140
141
142
143
144
147
148
149
150
151
152
153
154
155
156
157
160
O4 = Output CMOS 4mA ;
O8D = Output CMOS 8mA, Open Drain ;
O8T = Output CMOS 8mA, Tristate
XTAL2 : NTEST pin at 0 has no effect on this pin.
: Input 1 TTL
: Input 2 TTL + pull-up
: Input 3 TTL + hysteresis
: Input 4 TTL + hysteresis +pull-up
: Output CMOS 4mA
: Output CMOS 4mA, Tristate
: Output CMOS 8mA
: Output CMOS 8mA,Tristate
Symbol
NTEST
DM10
DM11
DM12
DM13
DM14
DM15
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
DM9
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I2
Memory Data bit 0
Memory Data bit 1
Memory Data bit 2
Memory Data bit 3
Memory Data bit 4
Memory Data bit 5
Memory Data bit 6
Memory Data bit 7
Memory Data bit 8
Memory Data bit 9
Memory Data bit 10
Memory Data bit 11
Memory Data bit 12
Memory Data bit 13
Memory Data bit 14
Memory Data bit 15
Test Control. When this pin is at 0V each output is high impedance except XTAL2 Pin.
I2 = I1 + Pull-up ;
O4T = O4 + Tristate ;
I3 = I1 + Hysteresis ;
O8 = Output CMOS 8mA, "1" and "0" at Low Impedance ;
O8DT = Output CMOS 8mA, Open Drain or Tristate ;
Function
I4 = I3 + Pull-up ;
STLC5465B
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