stlc5465 STMicroelectronics, stlc5465 Datasheet - Page 38

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stlc5465

Manufacturer Part Number
stlc5465
Description
Multi Hdlc With Switching Matrix Associated
Manufacturer
STMicroelectronics
Datasheet

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STLC5465B
III - FUNCTIONAL DESCRIPTION (continued)
III.5 - Memory Interface
III.5.1 - Function Description
The memory interface allows the connection of
Static or Dynamic RAM. The memory space ad-
dressable in the two configurations is not the same.
In the case of dynamic memory (DRAM), the mem-
ory interface will address up to 16 Megabytes. In
case of static memory (SRAM) only 1 Megabyte will
be addressed. The memory location is always or-
ganized in 16 bits.
The memory is shared between the Multi-HDLC
and the microprocessor. The access to the memory
is arbitrated by an internal function of the circuit:
the bus arbitration.
III.5.2 - Choice of memory versus microproc-
essor and capacity required
The memory interface depends on the memory
chips which are connected. As the memory chips
will be chosen versus the microprocessor and the
wanted memory space, the following table pre-
sents the different configurations DRAM and
SRAM selection versus P.
Table 22 : DRAM and SDRAM Selection versus P
38/101
16 Megabits
64 Megabits
4 Megabits
1 Megabits
4 Megabits
16/32 bits
DRAM Circuits proposed
SRAM Circuits proposed
Processor
Processor
Capacity
Capacity
Microprocessor and
8 bits
shared memory
Organization
Organization
Megawords
Megabytes
Number of
Number of
256Kx16
128Kx8
512kx8
1Mx16
4Mx16
1Mx4
4Mx4
1(256Kx16)
4(128Kx8)
0.25
0.5
2(256Kx16)
8(128Kx8)
2(512kx8)
Shared memory size required by the application
0.5
1
4(256Kx16)
Example 1 : if the application requires 16 bit mProc-
essor and 1 Megaword Shared memory size, three
capabilities are offered :
- 4 DRAM Circuits (256Kx16) or
- 4 DRAM Circuits (1Mx4) or
- 1 DRAM Circuit (1Mx16).
Example 2 : if the application requires 8 bit mProc-
essor and 1 Megabyte Shared memory size, three
capabilities are offered:
- 2 DRAM Circuits (256Kx16) or
- 8 SRAM Circuits (128Kx8) or
- 2 SRAM Circuits (512kx8).
Example 3 : for small applications it is possible to
connect 2 SRAM Circuits (128Kx8) to obtain 256
Kilobytes shared memory.
III.5.3 - Memory Cycle
For SRAM and DRAM, the different cycles are
programmable. See Memory Interface Configura-
tion Regist. MICR (32)
Each cycle is equal to : p x 1/f
with f the frequency of signal applied to the Crystal
1 input and p selected by the user. See page 9.
1(1Mx16)
4(1Mx4)
2
1
2(1Mx16)
8(1Mx4)
4
2
Not possible
H
on Page 88.
16(1Mx4)
4(1Mx16)
1(4Mx16)
4(4Mx4)
8
4
2(4Mx16)
8(4Mx4)
16
8

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