W90221X Winbond Electronics Corp America, W90221X Datasheet - Page 51

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W90221X

Manufacturer Part Number
W90221X
Description
Pa-risc Embedded Controller
Manufacturer
Winbond Electronics Corp America
Datasheet
Debounce Clock Select Register (CLKREG)
Port address: 0x00000064
Bits 0-28
Bits 29-31
W90221X version 0.6
16
24
0
8
17
25
1
9
Reserved
Debounce clock rate selector
These three bits are used to select the debounce circuit clock rate.
The relationship of system clock (TCLK) and debounce clock
(TCLK_BUN) according to these three bits are as follows:
Each of fifteen general-purpose GPIO ports can be programmed as
input or output port independently. Each port can generate positive or
negative edge interrupt, and contains of a bi-directional buffer
connected to the appropriate W90221X pin, the output signal from the
input buffer is routed directly to a debounce circuit. This circuit
performs 3 TCLK_BUN (program by CLKREG register) debounce of
the input signal. Reading a specific bit location within the IO Data
Input Register returns the logic state of the respective general
purpose IO pin, regardless of whether that pin is configured as an
output or input. If the pin is configured as an output an input, the value
read is the logic state of the pin as driven by W90221X pin.
Reserved
10
18
26
2
TCLK_BUN = TCLK/CLKREG[29:31]
Access type: read
11
19
27
3
Reserved
Reserved
Reserved
12
20
28
4
Debounce Clock Rate [0:2]
13
21
29
5
14
22
30
6
Default: 0x0
15
23
31
7
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