W90221X Winbond Electronics Corp America, W90221X Datasheet - Page 187

• Manufacturer Part Number: W90221X
• Description: Pa-risc Embedded Controller
• Manufacturer: Winbond Electronics Corp America

APPENDIX A : ARCHITECTURE IMPLEMENT DEPENDENT
REGISTERS
AIR[0] : Internal configuration register
AIR[1] : PSW register - for testing only
AIR[2] : TMR register - for testing only
AIR[3] : NonCacheable Offset register
address, defined by non-
W90221X version 0.6
- bit 31 : Internal Icache enable
- bit 30 : Internal Dcache enable
- bit 29 : shall be the same as bit-30
- bit 28 : Default endian bit
- bit 27 : BTB enable
- bit 26 : reserved
- bit 25 : Multiplier fraction mode
- bit 24 : reserved
- bit 23 : Freeze 1st 1K of Icache
- bit 22 : Freeze 2nd 1K of Icache
- bit 21 : Freeze 3rd 1K of Icache
- bit 20 : Freeze 4th 1K of Icache
- bit 0-15 : reserve
- bit 16-19 : system non-cacheabel region
- bit 20
- bit 21-23: Size of non-cacheable region 1
- bit 24-26: Size of non-cacheable region 2
: 0xA0000 ~ 0xFFFFF are non-cacheable
0 : No
000 : disable
001 : 64K
001 : 128K
001 : 256K
001 : 512K
001 : 1M
001 : 2M
001 : 4M
0000 : all system memory are cacheable
0001 : system memory above 1M are non-cacheable
0010 : system memory above 2M are non-cacheable
0011 : system memory above 4M are non-cacheable
0100 : system memory above 8M are non-cacheable
0101 : system memory above 16M are non-cacheable
0110 : system memory above 32M are non-cacheable
0111 : system memory above 64M are non-cacheable
1000 : system memory above 128M are non-cacheable
1001 : system memory above 256M are non-cacheable
The bit definition is the same as that of bit 21-23. The base
1 : Yes
(default : 12'b0)
(0/1 - disable/enable)
(0/1 - disable/enable)
(0/1 - big-/little-endian)
(0/1 - disable/enable)
(0/1 - integer/fraction mode)
(0/1 - disable/enable)
(0/1 - disable/enable)
(0/1 - disable/enable)
(0/1 - disable/enable)
(default : 32'b0)
- 187 -