W90221X Winbond Electronics Corp America, W90221X Datasheet - Page 22

• Manufacturer Part Number: W90221X
• Description: Pa-risc Embedded Controller
• Manufacturer: Winbond Electronics Corp America

5.6 MEMORY CONTROLLER
5.6.1 Overview
The MEMC module within W90221X contains configuration register, control register, timing
control registers and other logic to provide 32 bits SDRAM interface with external SDRAM
memory devices, the flexible timing programming can achieve you use different
speed of SDRAM whatever it is 32 bits on board.
5.6.2 Block Diagram
Figure 5.6.2.1 Block diagram of memory controller.
5.6.3 Features
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5.6.4 Related Pins
CS0L#, CS1L# (out)
RAS#, CAS# (out)
WE# (out)
W90221X version 0.6
Supports up to 2 banks of SDRAM (DIMM or ON BOARD)
32-bit data interface
CAS#-Before-RAS# refresh cycles for DRAM module
Programmable RAS#/CAS# timing for DRAM access
Supports only a burst length of one and burst type of sequential
Programmable CAS# latency access time
Provides 1M, 2M, 4M, 8M, 16M DRAM with page size 256 bytes, 512 bytes, 1K bytes, 2K
bytes, 4K bytes configuration
These signals are served as CS0L#, CS1L# In SDRAM mode that indicates whether the
command decoder is enable or disable.
This signals along with WE# and CS# define the command is being entered when using
SDRAM configuration.
This signals asserted indicates a write cycle to DRAM.
14.318 Mhz
Command/Address
Refresh counter
CS0L#, CS0H#, CS1L#, CS1H#, RAS#,
CAS#, WE#, CKE, MCLK, DQMB[0:3]
486 CPU bus
state
registers
DRAM
DRAM
Data Buffer
Control
BA[1:0], MA[11:0]
MA Generator
MD[0:31]]
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