W90221X Winbond Electronics Corp America, W90221X Datasheet - Page 36

• Manufacturer Part Number: W90221X
• Description: Pa-risc Embedded Controller
• Manufacturer: Winbond Electronics Corp America

GPIO[9]/nSelectIn (output)
GPIO[17]/nAck (input)
GPIO[18]/Busy (input)
GPIO[11]/PError (input)
GPIO[10]/Select (input)
GPIO[12]/nFault (input)
GPIO[0:7]/ED[0:7] (in/out)
5.12 UART
5.12.1 Overview
The W90221X contains two Universal Asynchronous Receiver/Transmitter (UART) ports, one
of them provides complete MODEM-control and serial transformation capabilities, whereas
the other one provides only serial transformation capability. The UART performs serial-to-
parallel conversion on data characters received from a peripheral device such as MODEM,
and parallel-to-serial conversion on data characters received from the CPU. One 16 bytes
transmitter FIFO (TX-FIFO) and one 16 bytes (plus 3 bits of error data per byte) receiver FIFO
(RX-FIFO) have been built in to reduce the number of interrupts presented to the CPU. The
CPU can read the complete status of the UART at any time during the functional operation.
W90221X version 0.6
Compatible Mode:Set low by host to select peripheral device.
ECP Mode:
Compatible Mode:Pulse low by the peripheral device to acknowledge transfer of a data
ECP Mode:
Compatible Mode:Driven high to indicate that the peripheral device is not ready to
ECP Mode:
Compatible Mode:Driven high to indicate that the peripheral device has encountered an
ECP Mode:
Compatible Mode:Set high to indicate that the peripheral device is on-line.
ECP Mode:
8-bit bus used to hold data, address or command information in all modes. The bit 0 is
the most significant bit.
Compatible Mode:Set low by peripheral device to indicate that an error has occurred.
ECP Mode:
Set high to acknowledge 1284 compatibility during negotiation phase.
Driven high by host while in ECP mode. Set low by host to terminate
ECP mode and return the link to the compatible mode.
byte from the host.
Used in a close-loop handshake with "nAufoFd" to transfer data
during reverse transferring.
receive data.
The peripheral device uses this signal for flow control in the forward
transferring. "Busy" also provides a ninth data bit used to determine
whether command or data information is present on the data signals
in the reverse direction.
error in its paper path (ex. paper empty). Peripherals shall set nFault"
low whenever they set "PError" high.
Peripherals drive this signal low to acknowledge "nInit". The host
relies upon "PError" to determine when it is permitted to drive the
data signals.
Used by peripheral to reply to the requested extensibility byte sent by
the host during the negotiation phase.
During ECP mode the peripheral may drive this pin low to request
communications with the host. This signal would be typically used to
generate an interrupt to the host. This signal is valid in both forward
and reverse transfers.
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