IDT82P2816BB IDT, Integrated Device Technology Inc, IDT82P2816BB Datasheet - Page 9

• Manufacturer Part Number: IDT82P2816BB
• Description: IC LIU T1/J1/E1 16+1CH 416-PBGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT82P2816BB

• Function: Line Interface Unit (LIU)
• Interface: E1, J1, T1
• Number Of Circuits: 1
• Voltage - Supply: 1.8V, 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: *
• Includes: Defect and Alarm Detection, Driver Over-Current Detection and Protection, LLOS Detection, PRBSARB / IB Detection and Generation
• Number Of Transceivers: 1
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Current - Supply: -
• Power (watts): -
• Lead Free Status / RoHS Status: Not Compliant, Contains lead / RoHS non-compliant
• Other names: 82P2816BB

IDT82P2816
16(+1) CHANNEL HIGH-DENSITY T1/E1/J1 LINE INTERFACE UNIT
Figure-49 CLKE1 Clock Timing Diagram ................................................................................................................................................................... 127
Figure-50 E1 Jitter Tolerance Performance ............................................................................................................................................................... 129
Figure-51 T1/J1 Jitter Tolerance Performance .......................................................................................................................................................... 129
Figure-52 E1 Jitter Transfer Performance ................................................................................................................................................................. 130
Figure-53 T1/J1 Jitter Transfer Performance ............................................................................................................................................................. 130
Figure-54 Read Operation in Serial Microprocessor Interface .................................................................................................................................. 131
Figure-55 Write Operation in Serial Microprocessor Interface ................................................................................................................................... 131
Figure-56 Timing Diagram ......................................................................................................................................................................................... 132
Figure-57 Parallel Motorola Non-Multiplexed Microprocessor Interface Read Cycle ................................................................................................ 133
Figure-58 Parallel Motorola Non-Multiplexed Microprocessor Interface Write Cycle ................................................................................................ 134
Figure-59 Parallel Intel Non-Multiplexed Microprocessor Interface Read Cycle ....................................................................................................... 135
Figure-60 Parallel Intel Non-Multiplexed Microprocessor Interface Write Cycle ........................................................................................................ 136
Figure-61 Parallel Motorola Multiplexed Microprocessor Interface Read Cycle ........................................................................................................ 137
Figure-62 Parallel Motorola Multiplexed Microprocessor Interface Write Cycle ........................................................................................................ 138
Figure-63 Parallel Intel Multiplexed Microprocessor Interface Read Cycle ............................................................................................................... 139
Figure-64 Parallel Intel Multiplexed Microprocessor Interface Write Cycle ............................................................................................................... 140
Figure-65 JTAG Timing ............................................................................................................................................................................................. 141
List of Figures
9
February 6, 2009