IDT82P2816BB IDT, Integrated Device Technology Inc, IDT82P2816BB Datasheet - Page 76

• Manufacturer Part Number: IDT82P2816BB
• Description: IC LIU T1/J1/E1 16+1CH 416-PBGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT82P2816BB

• Function: Line Interface Unit (LIU)
• Interface: E1, J1, T1
• Number Of Circuits: 1
• Voltage - Supply: 1.8V, 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: *
• Includes: Defect and Alarm Detection, Driver Over-Current Detection and Protection, LLOS Detection, PRBSARB / IB Detection and Generation
• Number Of Transceivers: 1
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Current - Supply: -
• Power (watts): -
• Lead Free Status / RoHS Status: Not Compliant, Contains lead / RoHS non-compliant
• Other names: 82P2816BB

GPIO - General Purpose I/O Pin Definition Register
Address: 100H
Type: Read / Write
Default Value: 0FH
Programming Information
IDT82P2816
7 - 4
Bit
3
2
1
0
7
-
LEVEL1
LEVEL0
Name
DIR1
DIR0
-
6
-
Reserved.
When the GPIO1 pin is defined as output, this bit determines the output level on GPIO1 and can be read and written.
0: Output low level.
1: Output high level. (default)
When the GPIO1 pin is defined as input, this bit indicates the input level on GPIO1 and can only be read.
0: Input low level.
1: Input high level. (default)
When the GPIO0 pin is defined as output, this bit determines the output level on GPIO0 and can be read and written.
0: Output low level.
1: Output high level.
When the GPIO0 pin is defined as input, this bit indicates the input level on GPIO0 and can only be read.
0: Input low level.
1: Input high level. (default)
This bit determines whether the GPIO1 pin is used as output or input.
0: Output.
1: Input. (default)
This bit determines whether the GPIO0 pin is used as output or input.
0: Output.
1: Input. (default)
5
-
4
-
16(+1) CHANNEL HIGH-DENSITY T1/E1/J1 LINE INTERFACE UNIT
76
LEVEL1
3
Description
LEVEL0
2
DIR1
1
February 6, 2009
DIR0
0