IDT82P2816BB IDT, Integrated Device Technology Inc, IDT82P2816BB Datasheet - Page 77

• Manufacturer Part Number: IDT82P2816BB
• Description: IC LIU T1/J1/E1 16+1CH 416-PBGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT82P2816BB

• Function: Line Interface Unit (LIU)
• Interface: E1, J1, T1
• Number Of Circuits: 1
• Voltage - Supply: 1.8V, 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: *
• Includes: Defect and Alarm Detection, Driver Over-Current Detection and Protection, LLOS Detection, PRBSARB / IB Detection and Generation
• Number Of Transceivers: 1
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Current - Supply: -
• Power (watts): -
• Lead Free Status / RoHS Status: Not Compliant, Contains lead / RoHS non-compliant
• Other names: 82P2816BB

CLKG - CLKT1 & CLKE1 Generation Control Register
REFCF - REFA/B Output Configuration Register
Address: 200H
Type: Read / Write
Default Value: 30H
Address: 1C0H
Type: Read / Write
Default Value: 0FH
Programming Information
IDT82P2816
7 - 4
Bit
Bit
7
6
5
4
3
2
1
0
7
7
-
-
FS_BYPAS
CLKE1_EN
JA_BYPAS
CLKT1_EN
CLKE1
CLKT1
Name
Name
REFH
-
-
JA_BYPAS
6
6
-
Reserved.
This bit is valid only when the clock source for REFA or REFB is the recovered clock of one of the 17 channels in the correspond-
ing receiver. This bit determines whether the selected recovered clock passes through the RJA.
0: The selected recovered clock is derived from the output of RJA. (default)
1: The selected recovered clock does not pass through the RJA and is derived from the output of Rx Clock & Data Recovery.
This bit is valid only when the selected clock source is lost. This bit controls the output on REFA/REFB.
For REFA, this bit, together with the FS_BYPAS bit (b4, REFCF) and the FREE bit (b3, REFCF), controls the output on REFA
when the selected clock source is the recovered clock of one of the 17 channels; this bit is ignored when the selected clock
source is CLKA. Refer to the related table in the description of the FREE bit (b3, REFCF).
For REFB:
0: Output free running clock. The frequency is 1.544 MHz if the selected clock source was T1 clock or 2.048 MHz if the selected
clock source was E1 clock.
1: Output high level. (default)
This bit determines whether the selected clock source for REFA passes through an internal Frequency Synthesizer.
0: The internal Frequency Synthesizer is enabled.
1: The internal Frequency Synthesizer is bypassed. (default)
Reserved.
This bit controls whether the output on the CLKE1 pin is enabled.
0: The output is disabled. CLKE1 is in High-Z state.
1: The output is enabled. The frequency of CLKE1 is determined by the CLKE1 bit (b2, CLKG). (default)
This bit is valid only when the CLKE1_EN bit (b3, CLKG) is ‘1’. This bit selects the clock frequency output on the CLKE1 pin.
0: 8 KHz.
1: 2.048 MHz. (default)
This bit controls whether the output on the CLKT1 pin is enabled.
0: The output is disabled. CLKT1 is in High-Z state.
1: The output is enabled. The frequency of CLKT1 is determined by the CLKT1 bit (b0, CLKG). (default)
This bit is valid only when the CLKT1_EN bit (b1, CLKG) is ‘1’. This bit selects the clock frequency output on the CLKT1 pin.
0: 8 KHz.
1: 1.544 MHz. (default)
REFH
5
5
-
FS_BYPAS
4
4
-
16(+1) CHANNEL HIGH-DENSITY T1/E1/J1 LINE INTERFACE UNIT
77
CLKE1_EN
FREE
3
3
Description
Description
CLKE1
FREQ2
2
2
CLKT1_EN
FREQ1
1
1
February 6, 2009
CLKT1
FREQ0
0
0