IDT82P2816BB IDT, Integrated Device Technology Inc, IDT82P2816BB Datasheet - Page 89

• Manufacturer Part Number: IDT82P2816BB
• Description: IC LIU T1/J1/E1 16+1CH 416-PBGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT82P2816BB

• Function: Line Interface Unit (LIU)
• Interface: E1, J1, T1
• Number Of Circuits: 1
• Voltage - Supply: 1.8V, 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: *
• Includes: Defect and Alarm Detection, Driver Over-Current Detection and Protection, LLOS Detection, PRBSARB / IB Detection and Generation
• Number Of Transceivers: 1
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Current - Supply: -
• Power (watts): -
• Lead Free Status / RoHS Status: Not Compliant, Contains lead / RoHS non-compliant
• Other names: 82P2816BB

RCF0 - Receive Configuration Register 0
Address: 00AH, 04AH, 08AH, 0CAH, 10AH, 14AH, 18AH, 1CAH, (CH1~CH8)
Type: Read / Write
Default Value: 47H
Programming Information
IDT82P2816
2 - 0
Bit
7
6
5
4
3
RCKH
20AH, 24AH, 28AH, 2CAH, 30AH, 34AH, 38AH, 3CAH, (CH9~CH16)
7CAH (CH0)
7
R_TERM[2:0]
R_SING
R120IN
R_OFF
Name
RCKH
RHZ
RHZ
6
This bit determines the output on RCLKn when LLOS is detected. This bit is valid only when LLOS is detected and the AIS and
pattern generation is disabled in the receive path.
0: XCLK. (default)
1: High level.
This bit determines the output of all receive system interfaced pins (including RDn, RDPn, RDNn, RMFn and RCLKn) when the
corresponding receiver is powered down.
0: Low level.
1: High-Z. (default)
This bit determines whether the receiver is powered down.
0: Normal operation. (default)
1: Power down.
This bit is valid only when the receive line interface is in Receive Differential mode and per-channel internal impedance matching
configuration is enabled. This bit selects the internal impedance matching mode.
0: Partially Internal Impedance Matching mode. An internal programmable resistor (IM) and a value-fixed external resistor (Rr)
are used. (default)
1: Fully Internal Impedance Matching mode. Only an internal programmable resistor (IM) is used.
This bit determines the receive line interface.
0: Receive Differential line interface. Both RTIPn and RRINGn are used to receive signal from the line side. (default)
1: Receive Single Ended line interface. Only RTIPn is used to receive signal. RRINGn should be left open.
These bits are valid only when impedance matching is configured on a per-channel basis. These bits select the impedance
matching mode of the receive path to match the cable impedance.
In Receive Differential mode:
000: The 100 Ω internal impedance matching is selected for T1 100 Ω twisted pair cable.
001: The 110 Ω internal impedance matching is selected for J1 110 Ω twisted pair cable.
010: The 120 Ω internal impedance matching is selected for E1 120 Ω twisted pair cable.
011: The 75 Ω internal impedance matching is selected for E1 75 Ω coaxial cable.
1XX: External impedance matching is selected for T1 100 Ω , J1 110 Ω , E1 120 Ω twisted pair cable and E1 75 Ω coaxial cable.
In Receive Single Ended mode, only External Impedance Matching is supported and the setting of these bits is a don’t-care.
(default)
R_OFF
5
R120IN
4
16(+1) CHANNEL HIGH-DENSITY T1/E1/J1 LINE INTERFACE UNIT
89
R_SING
3
Description
R_TERM2
2
R_TERM1
1
February 6, 2009
R_TERM0
0