UPD78F0988AGC-8BS Renesas Electronics America, UPD78F0988AGC-8BS Datasheet - Page 281

• Manufacturer Part Number: UPD78F0988AGC-8BS
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0988AGC-8BS

• Lead Free Status / Rohs Status: Supplier Unconfirmed

CPU processing
14.4.5 Pending interrupt requests
executed, request acknowledgement is held pending until the end of execution of the next instruction. These
instructions (instructions that have interrupt requests held pending) are listed below.
There are instructions where, even if an interrupt request is issued for them while another instruction is being
• MOV
• MOV
• MOV
• MOV1
• MOV1
• AND1
• OR1
• XOR1
• SET1
• CLR1
• RETB
• RETI
• PUSH
• POP
• BT
• BF
• BTCLR PSW. bit, $addr16
• EI
• DI
• Manipulation instruction to IF0L, IF0H, IF1L, MK0L, MK0H, MK1L, PR0L, PR0H, PR1L, EGP, EGN, EGP5, EGN5
Caution The BRK instruction is not one of the above-listed instructions that have interrupt requests held
The timing with which interrupt requests are held pending is shown in Figure 14-15.
Remarks 1. Instruction N: Instruction that has interrupt request held pending
registers
IF
pending. However, the software interrupt activated by executing the BRK instruction causes the
IE flag to be cleared to 0. Therefore, even if a maskable interrupt request is generated during
execution of the BRK instruction, the interrupt request is not acknowledged. However, the non-
maskable interrupt request is acknowledged.
2. Instruction M: Instruction other than one which has interrupt request held pending
3. The operation of
PSW, #byte
A, PSW
PSW, A
PSW. bit, CY
CY, PSW. bit
CY, PSW. bit
CY, PSW. bit
CY, PSW. bit
PSW. bit
PSW. bit
PSW
PSW
PSW. bit, $addr16
PSW. bit, $addr16
Instruction N
Figure 14-15. Pending Interrupt Request
IF (interrupt request) is not affected by the value of
CHAPTER 14 INTERRUPT FUNCTIONS
User’s Manual U13029EJ7V1UD
Instruction M
Saving PSW and PC, jumping
to interrupt servicing
PR (priority level).
Interrupt servicing
program
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