UPD78F0988AGC-8BS Renesas Electronics America, UPD78F0988AGC-8BS Datasheet - Page 267

• Manufacturer Part Number: UPD78F0988AGC-8BS
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0988AGC-8BS

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Symbol
(1) Interrupt request flag registers (IF0L, IF0H, IF1L)
IF0H SRIF0 SERIF0 TMIF011 TMIF001 TMIF010 TMIF000 TMIF7 PIF7
IF0L
IF1L
An interrupt request flag is set to 1 when the corresponding interrupt request is generated or when an instruction
is executed, and is cleared to 0 when the interrupt request is acknowledged, when the RESET signal is input,
or when an instruction is executed.
IF0L, IF0H, and IF1L are set by a 1-bit or 8-bit memory manipulation instruction. When using IF0L and IF0H
as a 16-bit register, IF0, it is set by a 16-bit memory manipulation instruction.
RESET input clears these registers to 00H.
Cautions 1. The WDTIF flag can be read/written only when the watchdog timer is used as an interval
ADIF0
PIF6
7
7
7
CSIIF3
PIF5
6
6
6
2. Before restarting the timer, serial interface, or A/D converter in the standby mode, be sure
3. When an interrupt is acknowledged, the interrupt request flag is automatically cleared,
timer. Clear the WDTIF flag to 0 when watchdog timer mode 1 is used.
to clear the interrupt request flag. Note that noise may cause an interrupt request flag
to be set.
and then the interrupt routine is started.
TMIF52
PIF4
5
5
5
Figure 14-2. Format of Interrupt Request Flag Registers
TMIF51 TMIF50 STIF1 SRIF1 STIF0
PIF3
4
4
4
PIF2
3
3
3
CHAPTER 14 INTERRUPT FUNCTIONS
PIF1
2
2
2
User’s Manual U13029EJ7V1UD
PIF0 WDTIF
1
1
1
0
0
0
Address
FFE0H
FFE1H
FFE2H
0
1
IF
Interrupt request signal is not generated.
Interrupt request signal is generated and interrupt
is requested.
After reset
00H
00H
00H
Interrupt request flag
R/W
R/W
R/W
R/W
265