UPD78F0988AGC-8BS Renesas Electronics America, UPD78F0988AGC-8BS Datasheet - Page 128
UPD78F0988AGC-8BS
Manufacturer Part Number
UPD78F0988AGC-8BS
Description
Manufacturer
Renesas Electronics America
Datasheet
1.UPD78F0988AGC-8BS.pdf
(431 pages)
Specifications of UPD78F0988AGC-8BS
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(2) Measurement of two pulse widths with free-running counter
126
Figure 6-21. Control Register Settings for Measurement of Two Pulse Widths with Free-Running Counter
Remarks 1. 0/1: Setting 0 or 1 allows another function to be used simultaneously with pulse width measurement.
When 16-bit timer counter 0n (TM0n) is operated in free-running mode (see register settings in Figure 6-21),
it is possible to simultaneously measure the pulse widths of the two signals input to the TI00n and the TI01n pins.
When the edge specified by bits 4 and 5 (ES0n0, ES0n1) of prescaler mode register 0n (PRM0n) is input to the
TI00n pin, the value of TM0n is taken into 16-bit capture/compare register 01n (CR01n) and an external interrupt
request signal (INTTM01n) is set.
Also, when the edge specified by bits 6 and 7 (ES1n0, ES1n1) of PRM0n is input to the TI01n pin, the value of
TM0n is taken into 16-bit capture/compare register 00n (CR00n) and an external interrupt request signal
(INTTM00n) is set.
The valid edges of the TI00n and TI01n pins are specified by bits 4 and 5 (ES0n0, ES0n1), and bits 6 and 7 (ES1n0,
ES1n1) of PRM0n, respectively. It is possible to select the rising edge, falling edge or both edges as the valid
edge.
When sampling is performed at the count clock cycle selected by PRM0n and the valid level of the TI00n or TI01
pin is detected twice, the first capture operation is performed, resulting in the elimination of short pulse width
noise.
Remark n = 0, 1
CRC0n
TMC0n
2. n = 0, 1
0
0
See Figures 6-3 and 6-4 for details.
0
0
(a) 16-bit timer mode control register 0n (TMC0n)
(b) Capture/compare control register 0n (CRC0n)
0
0
CHAPTER 6 16-BIT TIMER/EVENT COUNTER
0
0
User’s Manual U13029EJ7V1UD
TMC0n3
0
0
CRC0n2
TMC0n2
1
1
CRC0n1
TMC0n1
0/1
0
CRC0n0
OVF0n
0
1
CR00n as capture register
Captures valid edge of TI01n pin to CR00n
CR01n as capture register
Free-running mode
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