UPD78F0988AGC-8BS Renesas Electronics America, UPD78F0988AGC-8BS Datasheet - Page 137

• Manufacturer Part Number: UPD78F0988AGC-8BS
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0988AGC-8BS

• Lead Free Status / Rohs Status: Supplier Unconfirmed

(4) Capture register data retention timing
(5) Valid edge setting
If the valid edge of the TI00n pin is input during 16-bit capture/compare register 01n (CR01n) read, CR01n
performs a capture operation, but the capture value at this time is not guaranteed. However, the interrupt request
signal (TMIF01n) is set upon detection of the valid edge.
Remark n = 0, 1
Remark n = 0, 1
Set the valid edge of the TI00n pin after setting bits 2 and 3 (TMC0n2 and TMC0n3) of 16-bit timer mode control
register 0n (TMC0n) to 0, and stopping timer operation. The valid edge is set with bits 4 and 5 (ES0n0 and ES0n1)
of prescaler mode register 0n (PRM0n).
Remark n = 0, 1
CR01n interrupt value
Interrupt request flag
Capture read signal
TM0n count value
Count clock
Edge input
Figure 6-35. Capture Register Data Retention Timing
CHAPTER 6 16-BIT TIMER/EVENT COUNTER
X
Capture operation
N
User’s Manual U13029EJ7V1UD
N + 1
N + 2
N + 1
M
but not guaranteed
Capture operation,
M + 1
M + 2
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