UPD78F0988AGC-8BS Renesas Electronics America, UPD78F0988AGC-8BS Datasheet - Page 133

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UPD78F0988AGC-8BS

Manufacturer Part Number
UPD78F0988AGC-8BS
Description
Manufacturer
Renesas Electronics America
Datasheet

Specifications of UPD78F0988AGC-8BS

Lead Free Status / Rohs Status
Supplier Unconfirmed
6.5.4 External event counter operation
counter 0n (TM0n).
to 0 and an interrupt request signal (INTTM00n) is generated.
rising edge, falling edge or both edges.
the first capture operation is performed, resulting in the elimination of short pulse width noise.
The external event counter counts the number of external clock pulses to be input to the TI00n pin by 16-bit timer
TM0n is incremented each time the valid edge specified by prescaler mode register 0n (PRM0n) is input.
When the TM0n count value matches the 16-bit capture/compare register 00n (CR00n) value, TM0n is cleared
A value other than 0000H should be set for CR00n (a 1-pulse count operation is not possible).
Specify the valid edge of the TI00n pin using bits 4 and 5 (ES0n0, ES0n1) of PRM0n. It is possible to select the
Caution
Remark n = 0, 1
Remarks 1. 0/1: Setting 0 or 1 allows another function to be used simultaneously with the external event counter.
When sampling is performed at the internal clock (f
TMC0n
CRC0n
2. n = 0, 1
0
0
When the 16-bit timer/event counter is being used as an external event counter, the P54/TI000/
TO00/INTP4 pin (P56/TI001/TO01/INTP6 pin) cannot be used for timer output (TO00 (TO01)).
Figure 6-28. Control Register Settings in External Event Counter Mode
0
0
See Figures 6-3 to 6-6 for details.
0
0
(a) 16-bit timer mode control register 0n (TMC0n)
(b) Capture/compare control register 0n (CRC0n)
0
0
CHAPTER 6 16-BIT TIMER/EVENT COUNTER
TMC0n3
1
0
TMC0n2
CRC0n2
User’s Manual U13029EJ7V1UD
0/1
1
TMC0n1
CRC0n1
0/1
0/1
CRC0n0
OVF0n
X
/2
0
0
4
) and the valid level of the TI00n pin is detected twice,
Clears and starts on match between TM0n and CR00n.
CR00n as compare register
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