UPD78F0988AGC-8BS Renesas Electronics America, UPD78F0988AGC-8BS Datasheet - Page 214
UPD78F0988AGC-8BS
Manufacturer Part Number
UPD78F0988AGC-8BS
Description
Manufacturer
Renesas Electronics America
Datasheet
1.UPD78F0988AGC-8BS.pdf
(431 pages)
Specifications of UPD78F0988AGC-8BS
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(2) A/D conversion by software start
A/D conversion
By setting bit 6 (TRG0) of A/D converter mode register 0 (ADM0) to 0 and setting bit 7 (ADCS0) to 1, the voltage
applied to the analog input pin specified by analog input channel specification register 0 (ADS0) is converted
into a digital value.
When A/D conversion is complete, the result of the conversion is stored in A/D conversion result register 0
(ADCR0), and an interrupt request signal (INTAD0) is generated. When A/D conversion is started once, and
one A/D conversion is complete, the next A/D conversion is immediately started. In this way, A/D conversion
is repeatedly executed until new data is written to ADS0.
If ADS0 is rewritten during A/D conversion, the conversion under execution is stopped, and A/D conversion
of the newly selected analog input channel is started.
If data whose ADCS0 is 0 is written to ADM0 during A/D conversion, the conversion is immediately stopped.
Remark
INTAD0
ADCR0
n = 0, 1, ..., 7
m = 0, 1, ..., 7
ADCS0 = 1, TRG0 = 0
Setting ADM0
Figure 11-7. A/D Conversion by Software Start
ANIn
CHAPTER 11 A/D CONVERTER
User’s Manual U13029EJ7V1UD
ANIn
ANIn
Conversion is stopped.
Conversion result
is not retained.
Rewriting ADS0
ANIn
ANIn
ANIm
ANIm
ADCS0 = 0
ANIm
Stopped
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