UPD78F0988AGC-8BS Renesas Electronics America, UPD78F0988AGC-8BS Datasheet - Page 270

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UPD78F0988AGC-8BS

Manufacturer Part Number
UPD78F0988AGC-8BS
Description
Manufacturer
Renesas Electronics America
Datasheet

Specifications of UPD78F0988AGC-8BS

Lead Free Status / Rohs Status
Supplier Unconfirmed
268
(4) External interrupt rising edge enable register (EGP), external interrupt falling edge enable register
(EGN)
EGP and EGN specify the valid edge to be detected on pins P00 to P03.
EGP and EGN can be read or written to with a 1-bit or 8-bit memory manipulation instruction.
RESET input clears these registers to 00H.
Symbol
Symbol
EGN
EGP
Figure 14-5. Format of External Interrupt Rising Edge Enable Register and
EGPn
7
7
0
0
0
0
1
1
EGNn
6
6
0
0
0
1
0
1
External Interrupt Falling Edge Enable Register
Interrupt disable
Falling edge
Rising edge
Both rising and falling edges
5
0
5
0
Valid edge of INTPn pin (n = 0 to 3)
CHAPTER 14 INTERRUPT FUNCTIONS
4
0
4
0
User’s Manual U13029EJ7V1UD
EGN3 EGN2 EGN1 EGN0
EGP3 EGP2 EGP1 EGP0
3
3
2
2
1
1
0
0
Address
Address
FF48H
FF49H
After reset
After reset
00H
00H
R/W
R/W
R/W
R/W

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