UPD78F0988AGC-8BS Renesas Electronics America, UPD78F0988AGC-8BS Datasheet - Page 111

• Manufacturer Part Number: UPD78F0988AGC-8BS
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0988AGC-8BS

• Lead Free Status / Rohs Status: Supplier Unconfirmed

ES0n1
ES1n1
0
0
1
1
0
0
1
1
• When CR00n is used as a compare register
• When CR00n is used as a capture register
n = 0, 1
n = 0, 1
CR00n is set by a 16-bit memory manipulation instruction.
RESET input makes the value of CR00n undefined.
Cautions 1. In the clear & start mode entered on a match between TM0n and CR00n, set CR00n to a value
Remark n = 0, 1
The value set in CR00n is constantly compared with the 16-bit timer counter 0n (TM0n) count value, and an
interrupt request (INTTM00n) is generated if they match. It can also be used as the register that holds the
interval time when TM0n is set to interval timer operation.
It is possible to select the valid edge of the TI00n pin or the TI01n pin as the capture trigger. Setting of the
TI00n or TI01n valid edge is performed by means of prescaler mode register 0n (PRM0n).
If CR00n is specified as a capture register and the capture trigger is specified to be the valid edge of the TI00n
pin, the situation is as shown in Table 6-2. On the other hand, when the capture trigger is specified to be the
valid edge of the TI01n pin, the situation is as shown in Table 6-3.
ES0n0
ES1n0
0
1
0
1
0
1
0
1
2. If the value of CR00n after changing is smaller than the value of 16-bit timer counter 0n
3. When P54 (P56) is used as the valid edge of TI000 (TI001), it cannot be used as the timer
other than 0000H. However, in the free-running mode and the clear mode of the valid edge
of TI00n, if CR00n is set to 0000H, an interrupt request (INTTM00n) is generated after the
overflow (FFFFH).
(TM0n), TM0n continues counting and overflows, then starts counting again from 0. Also,
if the value of CR00n after changing is less than the value before changing, it is necessary
to restart the timer after CR00n changes.
output (TO00 (TO01)). Also, if it is used as TO00 (TO01), it cannot be used as the valid edge
of TI000 (TI001).
Falling edge
Rising edge
Setting prohibited
Both rising and falling edges
Falling edge
Rising edge
Setting prohibited
Both rising and falling edges
Table 6-2. TI00n Pin Valid Edge and CR00n, CR01n Capture Triggers
TI00n Pin Valid Edge
Table 6-3. TI01n Pin Valid Edge and CR00n Capture Trigger
TI01n Pin Valid Edge
CHAPTER 6 16-BIT TIMER/EVENT COUNTER
User’s Manual U13029EJ7V1UD
Rising edge
Falling edge
Setting prohibited
No capture operation
CR00n Capture Trigger
Falling edge
Rising edge
Setting prohibited
Both rising and falling edges
CR00n Capture Trigger
Falling edge
Rising edge
Setting prohibited
Both rising and falling edges
CR01 Capture Trigger
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